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[Metaschedule] MultiLevelTiling for wide vector architectures #12845

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merged 4 commits into from
Sep 21, 2022

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@masahi masahi commented Sep 20, 2022

In MultiLevelTiling, the size of the loop that is going to be vectorized is completely random. This is not a good fit for backends with wide vector registers such as Hexagon.

This PR introduces an extension of MultiLevelTiling, to effectively utilize wide vectors. The loop over the innermost spatial axis of the output buffer is always vectorized with the maximum vector length. This makes it possible to auto schedule for Hexagon successfully.

cc @vinx13 @junrushao

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masahi commented Sep 20, 2022

@tvm-bot rerun

@masahi masahi merged commit fa5045b into apache:main Sep 21, 2022
xinetzone pushed a commit to daobook/tvm that referenced this pull request Nov 25, 2022
…#12845)

* [Metaschedule] Introduce MultiLevelTiling for wide vector architecture

* update test

* format

* cpplint
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