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Add registion for the operator asinh, acosh, atanh in llvm #17969

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Merged
Hzfengsy merged 2 commits into from
May 15, 2025
Merged

Add registion for the operator asinh, acosh, atanh in llvm #17969

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290d57f
Update intrin_rule_llvm.cc
jikechao May 13, 2025
94f88a5
Update intrin_rule_llvm.cc
jikechao May 13, 2025
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32 changes: 32 additions & 0 deletions src/target/llvm/intrin_rule_llvm.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -200,6 +200,38 @@ TVM_REGISTER_OP("tir.atan")
return asin(x / denom);
});

TVM_REGISTER_OP("tir.asinh")
.set_attr<FLegalize>("llvm.FLegalize", [](const PrimExpr& e) -> PrimExpr {
using tir::make_const;
const tir::CallNode* call = e.as<tir::CallNode>();
ICHECK(call != nullptr) << "Invalid call node in asinh legalization";
const PrimExpr& x = call->args[0];
PrimExpr one = make_const(x.dtype(), 1.0);
PrimExpr sqrt_val = sqrt(x * x + one);
return log(x + sqrt_val);
});

TVM_REGISTER_OP("tir.acosh")
.set_attr<FLegalize>("llvm.FLegalize", [](const PrimExpr& e) -> PrimExpr {
using tir::make_const;
const tir::CallNode* call = e.as<tir::CallNode>();
ICHECK(call != nullptr) << "Invalid call node in acosh legalization";
const PrimExpr& x = call->args[0];
PrimExpr one = make_const(x.dtype(), 1.0);
PrimExpr sqrt_val = sqrt(x * x - one);
return log(x + sqrt_val);
});

TVM_REGISTER_OP("tir.atanh")
.set_attr<FLegalize>("llvm.FLegalize", [](const PrimExpr& e) -> PrimExpr {
using tir::make_const;
const tir::CallNode* call = e.as<tir::CallNode>();
ICHECK(call != nullptr) << "Invalid call node in atanh legalization";
const PrimExpr& x = call->args[0];
PrimExpr one = make_const(x.dtype(), 1.0);
return (log(one + x) - log(one - x)) * make_const(x.dtype(), 0.5);
});

TVM_REGISTER_OP("tir.clz").set_attr<FLegalize>("llvm.FLegalize", [](const PrimExpr& e) -> PrimExpr {
const tir::CallNode* call = e.as<tir::CallNode>();
ICHECK(call != nullptr);
Expand Down