Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

[CODEGEN/LLVM] Initial support for codegen LLVM. #49

Merged
merged 2 commits into from
Feb 22, 2017
Merged

[CODEGEN/LLVM] Initial support for codegen LLVM. #49

merged 2 commits into from
Feb 22, 2017

Conversation

tqchen
Copy link
Member

@tqchen tqchen commented Feb 21, 2017 •
edited
Loading

Finished Item

  • Pass basic checks in tests/python/unittests/test_codegen_stack_llvm.py
  • JIT is supported.
  • Requires LLVM version >= 4.0
  • Rework the RTTI system in HalideIR so now tvm is indpendent from rtti as in llvm
    • Because LLVM compiles with fno-rtti, we need to follow this in order to be able to link with LLVM most people have

To Support

  • Vectorized load
  • NVPTX for ptx generation.
  • Mix LLVM pipeline with other codegens
  • Parallel loop

@tqchen tqchen requested a review from icemelon February 21, 2017 18:40
@tqchen tqchen changed the title [LLVM] Initial support for codegen LLVM. [CODEGEN/LLVM] Initial support for codegen LLVM. Feb 21, 2017
icemelon
icemelon approved these changes Feb 22, 2017
View reviewed changes
Copy link
Member

@icemelon icemelon left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

lgtm

@tqchen tqchen merged commit 8f240ee into master Feb 22, 2017
@tqchen tqchen mentioned this pull request Feb 24, 2017
Closed
5 tasks
tqchen added a commit to tqchen/tvm that referenced this pull request May 26, 2018
@tqchen
[Compatiblity] backward compatible to mxnet json (apache#49)
e6e715d
tqchen pushed a commit to tqchen/tvm that referenced this pull request May 26, 2018
@ZihengJiang @tqchen
[OP] Conv2d and Depthwise Conv2d for Raspberry Pi (apache#49)
8ce8069 
* [TUTORIAL] ImageNet Inference on Raspberry Pi

* Update tvm
tqchen added a commit that referenced this pull request May 29, 2018
@tqchen
[Compatiblity] backward compatible to mxnet json (#49)
9095415
tqchen pushed a commit that referenced this pull request May 29, 2018
@ZihengJiang @tqchen
[OP] Conv2d and Depthwise Conv2d for Raspberry Pi (#49)
275319d 
* [TUTORIAL] ImageNet Inference on Raspberry Pi

* Update tvm
tqchen added a commit to tqchen/tvm that referenced this pull request Jul 6, 2018
@tqchen
[Compatiblity] backward compatible to mxnet json (apache#49)
bf8bd96
tqchen pushed a commit to tqchen/tvm that referenced this pull request Jul 6, 2018
@ZihengJiang @tqchen
[OP] Conv2d and Depthwise Conv2d for Raspberry Pi (apache#49)
f8db4af 
* [TUTORIAL] ImageNet Inference on Raspberry Pi

* Update tvm
sergei-mironov pushed a commit to sergei-mironov/tvm that referenced this pull request Aug 8, 2018
@tqchen @sergei-mironov
[Compatiblity] backward compatible to mxnet json (apache#49)
73e49e9
sergei-mironov pushed a commit to sergei-mironov/tvm that referenced this pull request Aug 8, 2018
@ZihengJiang @sergei-mironov
[OP] Conv2d and Depthwise Conv2d for Raspberry Pi (apache#49)
30e7964 
* [TUTORIAL] ImageNet Inference on Raspberry Pi

* Update tvm
jroesch pushed a commit to jroesch/tvm that referenced this pull request Aug 29, 2018
@MarisaKirisame @jroesch
Back Propagation. Ready for PR. (apache#49)
d6da89e 
* commit

* do wlist

* commit

* fix lint

* fix lint

* do unaryop

* fix lint

* implement more for evaluator

* commit

* finish rev for binop

* accidentally deleted free_vars.h, force push.

* fix compile error

* fix lint

* impl more anf

* test passed. working on impl.

* impl body of anf

* add skeleton for lambda_backprop

* add node type according to lambda backprop

* fix lint

* commit whatever

* commit!

* remove reverse node, we dont need them

* add relay expr for ref, getref, setref

* Revert "remove reverse node, we dont need them"

This reverts commit fd7a93b1973c17321b6f0e108e3c5fc4ec8357d3.
kevinthesun pushed a commit to kevinthesun/tvm that referenced this pull request Oct 30, 2019
@mnuyens @yongwww
Adding back a check for empty library (apache#49)
ea3f8a2 
* Adding back a check for empty library

* Adding test for empty Module compilation
wjj19950828 pushed a commit to wjj19950828/tvm that referenced this pull request Sep 26, 2021
@jiangjiajun
Merge pull request apache#49 from heliqi/paddle_frontend
2bc59f5 
fix conv strides bug
MasterJH5574 pushed a commit to MasterJH5574/tvm that referenced this pull request Mar 7, 2022
@yzh119 @MasterJH5574
Format and Buffer data structure (apache#1)
7540891 
[SparseTIR] Constructors and Python Interface for `Axis` and `SparseBuffer` (apache#2)

* add methods for Object

* axis constructors

* methods for SparseBuffer

* put into registry

* python interface

[CherryPick][Intrinsic] lower_bound and upper_bound for binary search in Sparse TIR. (apache#483) (apache#4)

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* upd

* upd

* codegen-rule

* upd

* upd

* test

* upd

* fix

* two arguments

Co-authored-by: Zihao Ye <expye@outlook.com>

Fix AxisTree (apache#3)

* fix axis tree

* upd

[SparseTIR] Add SparseBufferLoad/SparseBufferStore (apache#5)

* Add dtype for SparseBuffer

* Add name for SparseBuffer. Remove `ndim`

* Remove namespace sparse

* Add SparseBufferLoad/Store

* Add method `ndim()`

[SparseTIR] Introduce SpIterVar (apache#6)

* [SparseTIR] Introduce SpIterVar

* Add conversion to PrimExpr

[BugFix] Fix binary search & SpIterVar (apache#7)

[BugFix] Add field `is_reduction` for SpIterVar (apache#9)

* [BugFix] Add field `is_reduction` for SpIterVar

* Formatting

[SparseTIR] Index Lowering (apache#8)

* Add StmtFunctor/ExprFunctor for SparseBufferStore/Load

* Add basic index lowering

* Finish index lowering (maybe)

* Address comments

* Convert CRLF to LF

Frontend update, demo scripts. (apache#10)

* Format and Buffer data structure (apache#1)

* [SparseTIR] Constructors and Python Interface for `Axis` and `SparseBuffer` (apache#2)

* add methods for Object

* axis constructors

* methods for SparseBuffer

* put into registry

* python interface

* [CherryPick][Intrinsic] lower_bound and upper_bound for binary search in Sparse TIR. (apache#483) (apache#4)

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* upd

* upd

* codegen-rule

* upd

* upd

* test

* upd

* fix

* two arguments

Co-authored-by: Zihao Ye <expye@outlook.com>

* Fix AxisTree (apache#3)

* fix axis tree

* upd

* Format and Buffer data structure (apache#1)

* [SparseTIR] Constructors and Python Interface for `Axis` and `SparseBuffer` (apache#2)

* add methods for Object

* axis constructors

* methods for SparseBuffer

* put into registry

* python interface

* fix axis tree

* upd

* Format and Buffer data structure (apache#1)

* [SparseTIR] Constructors and Python Interface for `Axis` and `SparseBuffer` (apache#2)

* add methods for Object

* axis constructors

* methods for SparseBuffer

* put into registry

* python interface

* [CherryPick][Intrinsic] lower_bound and upper_bound for binary search in Sparse TIR. (apache#483) (apache#4)

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* upd

* upd

* codegen-rule

* upd

* upd

* test

* upd

* fix

* two arguments

Co-authored-by: Zihao Ye <expye@outlook.com>

* Fix AxisTree (apache#3)

* fix axis tree

* upd

* [SparseTIR] Add SparseBufferLoad/SparseBufferStore (apache#5)

* Add dtype for SparseBuffer

* Add name for SparseBuffer. Remove `ndim`

* Remove namespace sparse

* Add SparseBufferLoad/Store

* Add method `ndim()`

* Format and Buffer data structure (apache#1)

* [SparseTIR] Constructors and Python Interface for `Axis` and `SparseBuffer` (apache#2)

* add methods for Object

* axis constructors

* methods for SparseBuffer

* put into registry

* python interface

* [CherryPick][Intrinsic] lower_bound and upper_bound for binary search in Sparse TIR. (apache#483) (apache#4)

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* fix

* upd

* upd

* upd

* upd

* upd

* upd

* upd

* codegen-rule

* upd

* upd

* test

* upd

* fix

* two arguments

Co-authored-by: Zihao Ye <expye@outlook.com>

* Fix AxisTree (apache#3)

* fix axis tree

* upd

* [SparseTIR] Add SparseBufferLoad/SparseBufferStore (apache#5)

* Add dtype for SparseBuffer

* Add name for SparseBuffer. Remove `ndim`

* Remove namespace sparse

* Add SparseBufferLoad/Store

* Add method `ndim()`

* [SparseTIR] Introduce SpIterVar (apache#6)

* [SparseTIR] Introduce SpIterVar

* Add conversion to PrimExpr

* [BugFix] Fix binary search & SpIterVar (apache#7)

* [BugFix] Add field `is_reduction` for SpIterVar (apache#9)

* [BugFix] Add field `is_reduction` for SpIterVar

* Formatting

* upd

* upd

Co-authored-by: Ruihang Lai <lairuihangdongdong@qq.com>

[SparseTIR] SparseBlock on C++/Python side (apache#11)

* Fix a bug in the last commit

* SparseBlock on C++ & Python side

[BugFix][SparseTIR] TVMScript Parser for Axis & SpIterVar (apache#12)

* Update `cord` and `pos`

* Fix `idtype`

* Formatting..

* Bug fix 1

* Move new special stmts

* Parser for Axis and SpIterVar

* Fix context_maintainer.py

[SparseTIR] Enhance SparseBlock to contain enough PrimFunc information (apache#13)

* Enhance SparseBlock to have enough PrimFunc info

* Remove `func_sparse_buffer_map_`

* Don't print the map uh-huh

[SparseTIR] Parser, Printer, Roundtrip (apache#14)

* SparseBlock scope handler (part 1)

* SparseBlock scope handler (part 2)

* SparseBlock scope handler (part 3)

* SparseBlock scope handler (fix 1)

* Add SparseBufferLoad/Store on Python side

* Parser for SparseBufferLoad/Store

* Add SparseBlock to Python __init__

* StmtFunctor for SparseBlock

* Ensure at least one dimension for SparseBuffer

* Make `axis` field of SpIterVar mandatory

* SparseBlock scope handler (fix 2)

* Update Axis syntax by removing `name` parameter

* Move to intrin.py

* Add filed `from_sparse` to DenseFixedAxis

* SparseTIR script printer

* Roundtrip test

* `update_symbol` bug fix

* Fix attr visit in SparseBuffer

* Define then compare in SparseBlock

* Fix printer bug for SparseBuffer

* Enable graph match for Axis and SparseBuffer

* Complete HashReduce and EqualReduce for AxisTree and SparseBuffer

* Fix typo

* Rename test

* Bug fix 1

* Bug fix 2

* Add more tests

Move tests (apache#15)

[SparseTIR] ReprPrinter for Axis and SpIterVar (apache#16)

upd (apache#17)

flatten (apache#18)

ELL and BSR correctness test scripts (apache#19)

[SparseTIR] SparseTIR Lowering (apache#20)

* Fix a previous bug of sparse-fixed SpIterVar creation

* Fix a previous bug in `GetDenseValue`

* Refactor Collector and IndexTransformer

* Construct block and loops

* Fix a previous bug which rejects DV iters in collector

* Update buffer map

* Create root block

* Fix bug of sparse-fixed SpIterVar creation

* Fix bug on SpIterVar conversion (with refactor)

* Fix bug when getting dependent SpIterVars

* Fix bug on dependency map and index lowering

* Full block read/write region

* Test version 1

* Fix bug of loop order

* Fix bug of batch-mm iterator ordering

* Update PrimFunc args to use symbolic params

* Fix bug of test "csr_element_wise"

* Fix bug of index accumulation for sparse-fixed axis

* Update correctness test

* Test structural equality

* Refactor and use Array

fix nnz cols

Add docstring for sparse tir lowering (apache#21)

* add docstring

* upd

Add more examples part 1 (sddmm) (apache#22)

* upd

* upd

* upd

[SparseTIR][Schedule] SparseBlockRV, GetSparseBlock, SparseReorder (apache#23)

* Test initialization

* Fix a stupid bug of ReprPrinter

* Add SparseBlockRV

* Schedule: GetSparseBlock

* Schedule: Reorder

[SparseTIR][Schedule] GetSpIters (apache#24)

remove hybrid script for successful compilation

Add atomic intrinsic for output nonzero inference. (apache#25)

* upd

* upd

Add "sparse" block attribute. (apache#26)

Revert "remove hybrid script for successful compilation"

This reverts commit eebd7c1.

[SparseTIR] Hack `IsAffineBinding` check (apache#27)

* [TensorIR][Schedule] Inherit block anotation upon creating new blocks

* Fix SDDMM test

* Hack IsAffineBinding for sparse blocks

Axis Dependency Tree aware code-gen and bmm example (apache#28)

* upd

* upd

* upd

* upd

* upd

* upd

* upd

* upd

* remove redundancy

* fix

* upd

* upd

Re-design Indices lowering (apache#29)

* upd

* upd

* upd

* upd

* upd

* init

* format

* fix

* revise coding-style

* format

Complete indices lowering (apache#30)

* upd

* upd

* upd

* done

* upd

* passed test

* upd

Add more docstrings and depress warnings for new lowering algorithm. (apache#31)

Refactor derived axis, frontend support of fusion. (apache#32)

* upd

* upd

* fix

Fatal bugfix and change the signature of DenseVariableAxis.  (apache#33)

Syntax simplification (apache#34)

Change the order of generated blocks for block isolation. (apache#35)

* upd

* upd

* upd

Syntax of AttachAxis for BMM (apache#36)

* upd

* upd

* upd

[SparseTIR] Add "square sum" lowering test (apache#37)

* Add square sum test

* Remove pylint comment

[BugFix] Fix offset caching in lowering (apache#38)

* Hack compact dataflow check in a dirty way

* Add two-K square sum test

* Mark skipped tests

* Fix offset saving in lowering

Fusion syntax fix + SDDMM example.  (apache#39)

Some structure change on update offsets. (apache#40)

[Refactor] SparseTIR Lowering (apache#41)

* Take out methods in Scope

* Refactor

* Refactor "match"

* Tweak scope contents

* Refactor ViewIndexInAxis

* Refactor Scope

* SDDMM tests under implementation

* Refactor block stack

* Use Map for var_map

* Extract NeedCreateNewBlock

* Simplify SpIterVarToIterVar via GetIterExtent

* Refactor NeedCreateNewBlock

* Add docstring

* Use "auto" correctly

* Minor refactor and use some move

Remove redundant analyzers (apache#42)

Support indices lowering for attach and fuse. (apache#43)

* upd

* upd

* upd

Fix irregular BMM example. (apache#44)

* upd

* upd

* upd

* upd

RGCN forward and butterfly pattern example. (apache#45)

Fused SDDMM example. (apache#46)

* upd

* wip

* fix

Fix sparse reorder after refactor (apache#47)

[Refactor] Refactor Unittest (apache#48)

* upd

* remove redundancy

[Unittest] Correctness test for benchmarking scripts (apache#49)

Bugfix and more test for axis fusion, new workload (apache#50)

* upd

* upd

upd
cyx-6 pushed a commit to cyx-6/tvm that referenced this pull request Jun 24, 2022
@junrushao
[IRBuilder] Minor tweaks (apache#49)
f96e789
cyx-6 pushed a commit to cyx-6/tvm that referenced this pull request Jun 25, 2022
@junrushao
[IRBuilder] Minor tweaks (apache#49)
02841b0
junrushao added a commit to cyx-6/tvm that referenced this pull request Jul 4, 2022
@junrushao
[IRBuilder] Minor tweaks (apache#49)
93d6750
cyx-6 pushed a commit to cyx-6/tvm that referenced this pull request Jul 13, 2022
@junrushao
[IRBuilder] Minor tweaks (apache#49)
db3fe26
Hzfengsy pushed a commit to Hzfengsy/tvm that referenced this pull request Jul 30, 2022
@junrushao @Hzfengsy
[IRBuilder] Minor tweaks (apache#49)
b66e678
vinx13 pushed a commit to vinx13/tvm that referenced this pull request Mar 27, 2023
@zxybazh
[TUZ-200] Enable Relax Operatos in Frontend for Layout Planning (apac…
87d008b 
…he#49)

This PR is follow up with previous efforts in ONNX frontend. To support
graph level layout planning, operators have to be imported as relax
operators. This PR addresses most of the current ops implemented with
topi.

CC: @sunggg @jwfromm
sunggg pushed a commit to sunggg/tvm that referenced this pull request Feb 28, 2024
@masahi
Use Flash attention instead of CUTLASS FMHA for Gemma prefill (apache#49
4d56c71 
)
masahi added a commit to masahi/tvm that referenced this pull request Mar 13, 2024
@masahi
Use Flash attention instead of CUTLASS FMHA for Gemma prefill (apache#49
5487628 
)
elvin-n pushed a commit to Deelvin/tvm that referenced this pull request Mar 19, 2024
@masahi @csullivan
Use Flash attention instead of CUTLASS FMHA for Gemma prefill (apache#49
1388721 
)
krishnaraj36 pushed a commit to krishnaraj36/tvm_mainline that referenced this pull request Aug 9, 2024
@srkreddy1238
Compiler options for windows env (apache#49)
7dd77e6 
Co-authored-by: Siva <quic_sivb@quicinc.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers

@icemelon icemelon icemelon approved these changes

Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
2 participants
@tqchen @icemelon