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Improve AArch64 depthwise convolution through smlal/smlal2 intrinsic #6711

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merged 6 commits into from
Nov 3, 2020

Commits on Oct 29, 2020

  1. Improve depthwise convolution through smlal/smlal2 intrinsic

    - Added an intrinsic to load a single int16x8 vector and produce two
      int32x4 output vectors through smlal/smlal2 instructions
    
    - Changed the NHWC depthwise schedule to accomodate the aforementioned
      intrinsic
    
    Change-Id: I347c3bf98fa8dd87057304dcda0d78e558424c57
    Giuseppe Rossini committed Oct 29, 2020
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  2. Address review comments

    Giuseppe Rossini committed Oct 29, 2020
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  3. Rebasing - 2

    Giuseppe Rossini committed Oct 29, 2020
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  4. Rebasing - 3

    Giuseppe Rossini committed Oct 29, 2020
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  5. Rebasing - 3

    Giuseppe Rossini committed Oct 29, 2020
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Commits on Oct 30, 2020

  1. Fix linting

    Giuseppe Rossini committed Oct 30, 2020
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