Publish v0.1.0 to crates.io

Cargo.toml

@@ -1,13 +1,15 @@
 [package]
-name = "arm_gic"
+name = "arm_gicv2"
 version = "0.1.0"
 edition = "2021"
 authors = ["Yuekai Jia <equation618@gmail.com>"]
-description = "ARM Generic Interrupt Controller (GIC) register definitions and basic operations"
+description = "ARM Generic Interrupt Controller version 2 (GICv2) register definitions and basic operations"
 license = "GPL-3.0-or-later OR Apache-2.0 OR MulanPSL-2.0"
 homepage = "https://github.com/arceos-org/arceos"
-repository = "https://github.com/arceos-org/arm_gic"
-documentation = "https://arceos-org.github.io/arm_gic"
+repository = "https://github.com/arceos-org/arm_gicv2"
+documentation = "https://docs.rs/arm_gicv2"
+keywords = ["arceos", "arm", "aarch64", "gic", "interrupt-controller"]
+categories = ["embedded", "no-std", "hardware-support", "os"]
 
 [dependencies]
 tock-registers = "0.8"

README.md

@@ -0,0 +1,9 @@
+# arm_gicv2
+
+[![Crates.io](https://img.shields.io/crates/v/arm_gicv2)](https://crates.io/crates/arm_gicv2)
+[![Docs.rs](https://docs.rs/arm_gicv2/badge.svg)](https://docs.rs/arm_gicv2)
+[![CI](https://github.com/arceos-org/arm_gicv2/actions/workflows/ci.yml/badge.svg?branch=main)](https://github.com/arceos-org/arm_gicv2/actions/workflows/ci.yml)
+
+ARM Generic Interrupt Controller version 2 (GICv2) register definitions and basic operations.
+
+The official documentation: <https://developer.arm.com/documentation/ihi0048/latest/>

src/lib.rs

@@ -1,15 +1,14 @@
-//! ARM Generic Interrupt Controller (GIC) register definitions and basic
-//! operations.
-
 #![no_std]
-#![feature(const_ptr_as_ref)]
 #![feature(const_option)]
 #![feature(const_nonnull_new)]
-
-pub mod gic_v2;
+#![doc = include_str!("../README.md")]
 
 use core::ops::Range;
 
+mod gic_v2;
+
+pub use gic_v2::{GicCpuInterface, GicDistributor};
+
 /// Interrupt ID 0-15 are used for SGIs (Software-generated interrupt).
 ///
 /// SGI is an interrupt generated by software writing to a GICD_SGIR register in