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rkvdec2: update reg in devicetree according to mailing list
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amazingfate authored and igorpecovnik committed Nov 4, 2024
1 parent 110fda1 commit 345cf34
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Showing 2 changed files with 11 additions and 8 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -3420,7 +3420,7 @@ index 000000000000..111111111111
+ if (ret)
+ return ret;
+
+ rkvdec->regs = devm_platform_ioremap_resource(pdev, 0);
+ rkvdec->regs = devm_platform_ioremap_resource_byname(pdev, "function");
+ if (IS_ERR(rkvdec->regs))
+ return PTR_ERR(rkvdec->regs);
+
Expand Down Expand Up @@ -3696,14 +3696,15 @@ index 111111111111..222222222222 100644
};

pinctrl: pinctrl {
@@ -2794,6 +2804,44 @@ gpio4: gpio@fec50000 {
@@ -2794,6 +2804,46 @@ gpio4: gpio@fec50000 {
#interrupt-cells = <2>;
};
};
+
+ vdec0: video-decoder@fdc38100 {
+ vdec0: video-decoder@fdc38000 {
+ compatible = "rockchip,rk3588-vdec";
+ reg = <0x0 0xfdc38100 0x0 0x500>;
+ reg = <0x0 0xfdc38000 0x0 0x100>, <0x0 0xfdc38100 0x0 0x500>, <0x0 0xfdc38600 0x0 0x100>;
+ reg-names = "link", "function", "cache";
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_RKVDEC0>, <&cru HCLK_RKVDEC0>, <&cru CLK_RKVDEC0_CA>,
+ <&cru CLK_RKVDEC0_CORE>, <&cru CLK_RKVDEC0_HEVC_CA>;
Expand All @@ -3720,9 +3721,10 @@ index 111111111111..222222222222 100644
+ sram = <&vdec0_sram>;
+ };
+
+ vdec1: video-decoder@fdc40100 {
+ vdec1: video-decoder@fdc40000 {
+ compatible = "rockchip,rk3588-vdec";
+ reg = <0x0 0xfdc40100 0x0 0x500>;
+ reg = <0x0 0xfdc40000 0x0 0x100>, <0x0 0xfdc40100 0x0 0x500>, <0x0 0xfdc40600 0x0 0x100>;
+ reg-names = "link", "function", "cache";
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_RKVDEC1>, <&cru HCLK_RKVDEC1>, <&cru CLK_RKVDEC1_CA>,
+ <&cru CLK_RKVDEC1_CORE>, <&cru CLK_RKVDEC1_HEVC_CA>;
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Original file line number Diff line number Diff line change
Expand Up @@ -45,13 +45,14 @@ index 111111111111..222222222222 100644
reg = <0x0 0xfdea0000 0x0 0x800>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vdpu";
@@ -686,6 +699,25 @@ vepu_mmu: iommu@fdee0800 {
@@ -686,6 +699,26 @@ vepu_mmu: iommu@fdee0800 {
#iommu-cells = <0>;
};

+ vdec: video-codec@fdf80200 {
+ compatible = "rockchip,rk3588-vdec";
+ reg = <0x0 0xfdf80200 0x0 0x500>;
+ reg = <0x0 0xfdf80100 0x0 0x100>, <0x0 0xfdf80200 0x0 0x500>, <0x0 0xfdf80700 0x0 0x100>;
+ reg-names = "link", "function", "cache";
+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, <&cru CLK_RKVDEC_CA>,
+ <&cru CLK_RKVDEC_CORE>, <&cru CLK_RKVDEC_HEVC_CA>;
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