Kernel bump: adjust broken patches

patch/kernel/archive/rockchip-6.11/patches.libreelec/linux-1000-drm-rockchip.patch

@@ -631,30 +631,6 @@ index 38dded2baaf7..9e460b7e14a4 100644
  err_clk:
  regulator_disable(hdmi->avdd_1v8);
 
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Wed, 8 Jan 2020 21:07:50 +0000
-Subject: [PATCH] clk: rockchip: set parent rate for DCLK_VOP clock on rk3228
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
----
- drivers/clk/rockchip/clk-rk3228.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
-index a24a35553e13..7343d2d7676b 100644
---- a/drivers/clk/rockchip/clk-rk3228.c
-+++ b/drivers/clk/rockchip/clk-rk3228.c
-@@ -409,7 +409,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
- RK2928_CLKSEL_CON(29), 0, 3, DFLAGS),
- DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
- RK2928_CLKSEL_CON(27), 8, 8, DFLAGS),
-- MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0,
-+ MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
- RK2928_CLKSEL_CON(27), 1, 1, MFLAGS),
-
- FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Sat, 10 Oct 2020 14:32:21 +0000
@@ -2646,37 +2622,6 @@ index ae4c49e84470..92e621f2714f 100644
 
  static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = {
 
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Alex Bee <knaerzche@gmail.com>
-Date: Tue, 1 Jun 2021 19:24:37 +0200
-Subject: [PATCH] drm/rockchip: allow 4096px width modes
-
-There is not reason to limit vop output to 3840px width modes.
-Also drop the limitation from dw_hdmi_rockchip_mode_valid, since
-the max dimenstions of the actual vop version is validated in
-vop_crtc_mode_valid anyways.
-
-Signed-off-by: Alex Bee <knaerzche@gmail.com>
----
- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-index ef0a078c22f4..49619f794061 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-@@ -424,8 +424,8 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win,
- if (info->is_yuv)
- is_yuv = true;
-
-- if (dst_w > 3840) {
-- DRM_DEV_ERROR(vop->dev, "Maximum dst width (3840) exceeded\n");
-+ if (dst_w > 4096) {
-+ DRM_DEV_ERROR(vop->dev, "Maximum dst width (4096) exceeded\n");
- return;
- }
-
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Tue, 1 Oct 2019 20:52:42 +0000

patch/kernel/archive/rockchip-6.6/patches.libreelec/linux-1000-drm-rockchip.patch

@@ -631,30 +631,6 @@ index 38dded2baaf7..9e460b7e14a4 100644
  err_clk:
  regulator_disable(hdmi->avdd_1v8);
 
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Jonas Karlman <jonas@kwiboo.se>
-Date: Wed, 8 Jan 2020 21:07:50 +0000
-Subject: [PATCH] clk: rockchip: set parent rate for DCLK_VOP clock on rk3228
-
-Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
----
- drivers/clk/rockchip/clk-rk3228.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/drivers/clk/rockchip/clk-rk3228.c b/drivers/clk/rockchip/clk-rk3228.c
-index a24a35553e13..7343d2d7676b 100644
---- a/drivers/clk/rockchip/clk-rk3228.c
-+++ b/drivers/clk/rockchip/clk-rk3228.c
-@@ -409,7 +409,7 @@ static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
- RK2928_CLKSEL_CON(29), 0, 3, DFLAGS),
- DIV(0, "sclk_vop_pre", "sclk_vop_src", 0,
- RK2928_CLKSEL_CON(27), 8, 8, DFLAGS),
-- MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0,
-+ MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
- RK2928_CLKSEL_CON(27), 1, 1, MFLAGS),
-
- FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Sat, 10 Oct 2020 14:32:21 +0000
@@ -2662,37 +2638,6 @@ index ae4c49e84470..92e621f2714f 100644
 
  static const u16 csc_coeff_rgb_full_to_rgb_limited[3][4] = {
 
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Alex Bee <knaerzche@gmail.com>
-Date: Tue, 1 Jun 2021 19:24:37 +0200
-Subject: [PATCH] drm/rockchip: allow 4096px width modes
-
-There is not reason to limit vop output to 3840px width modes.
-Also drop the limitation from dw_hdmi_rockchip_mode_valid, since
-the max dimenstions of the actual vop version is validated in
-vop_crtc_mode_valid anyways.
-
-Signed-off-by: Alex Bee <knaerzche@gmail.com>
----
- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-index ef0a078c22f4..49619f794061 100644
---- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
-@@ -424,8 +424,8 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win,
- if (info->is_yuv)
- is_yuv = true;
-
-- if (dst_w > 3840) {
-- DRM_DEV_ERROR(vop->dev, "Maximum dst width (3840) exceeded\n");
-+ if (dst_w > 4096) {
-+ DRM_DEV_ERROR(vop->dev, "Maximum dst width (4096) exceeded\n");
- return;
- }
-
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Jonas Karlman <jonas@kwiboo.se>
 Date: Tue, 1 Oct 2019 20:52:42 +0000

patch/kernel/archive/rockchip-rk3588-6.11/0130-phy-phy-rockchip-samsung-hdptx-Enable-runtime-PM.patch

@@ -1,35 +1,3 @@
-From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
-From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
-Date: Tue, 11 Jun 2024 02:06:10 +0300
-Subject: phy: phy-rockchip-samsung-hdptx: Explicitly include pm_runtime.h
-
-Driver makes use of helpers from pm_runtime.h, but relies on the header
-file being implicitly included.
-
-Explicitly pull the header in to avoid potential build failures in some
-configurations.
-
-Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver")
-Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
----
- drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
-index 111111111111..222222222222 100644
---- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
-+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
-@@ -15,6 +15,7 @@
- #include <linux/of_platform.h>
- #include <linux/phy/phy.h>
- #include <linux/platform_device.h>
-+#include <linux/pm_runtime.h>
- #include <linux/rational.h>
- #include <linux/regmap.h>
- #include <linux/reset.h>
--- 
-Armbian
-
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
 Date: Tue, 11 Jun 2024 02:28:26 +0300