rockchip-rk3588-6.12: update HDMI0 bridge patch

patch/kernel/archive/rockchip-rk3588-6.12/0135-arm64-dts-rockchip-Add-HDMI0-bridge-CLK-to-rk3588.patch

@@ -1,20 +1,20 @@
 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
 From: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
-Date: Mon, 15 Jan 2024 22:47:41 +0200
-Subject: arm64: dts: rockchip: Add HDMI0 bridge to rk3588
+Date: Sat, 19 Oct 2024 13:12:10 +0300
+Subject: arm64: dts: rockchip: Add HDMI0 node to rk3588
 
-Add DT node for the HDMI0 bridge found on RK3588 SoC.
+Add support for the HDMI0 output port found on RK3588 SoC.
 
 Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
 ---
- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 42 ++++++++++
- 1 file changed, 42 insertions(+)
+ arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 41 +++++++++++++++++++
+ 1 file changed, 41 insertions(+)
 
 diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
-index 111111111111..222222222222 100644
+index d97d84b88..bef584795 100644
 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
 +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
-@@ -1405,6 +1405,48 @@ i2s9_8ch: i2s@fddfc000 {
+@@ -1366,6 +1366,47 @@ i2s9_8ch: i2s@fddfc000 {
  		status = "disabled";
  	};
 
@@ -35,15 +35,14 @@ index 111111111111..222222222222 100644
 +			     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH 0>;
 +		interrupt-names = "avp", "cec", "earc", "main", "hpd";
 +		phys = <&hdptxphy_hdmi0>;
-+		phy-names = "hdmi";
 +		pinctrl-names = "default";
 +		pinctrl-0 = <&hdmim0_tx0_cec &hdmim0_tx0_hpd
 +			     &hdmim0_tx0_scl &hdmim0_tx0_sda>;
 +		power-domains = <&power RK3588_PD_VO1>;
 +		resets = <&cru SRST_HDMITX0_REF>, <&cru SRST_HDMIHDP0>;
 +		reset-names = "ref", "hdp";
 +		rockchip,grf = <&sys_grf>;
-+		rockchip,vo1_grf = <&vo1_grf>;
++		rockchip,vo-grf = <&vo1_grf>;
 +		status = "disabled";
 +
 +		ports {