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Update Vulkan-Headers to 1.2.200 #497

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Nov 23, 2021
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14 changes: 13 additions & 1 deletion ash/src/vk/bitflags.rs
Original file line number Diff line number Diff line change
Expand Up @@ -498,7 +498,7 @@ impl StencilFaceFlags {
pub const BACK: Self = Self(0b10);
#[doc = "Front and back faces"]
pub const FRONT_AND_BACK: Self = Self(0x0000_0003);
#[deprecated = "Alias for backwards compatibility"]
#[deprecated = "Backwards-compatible alias containing a typo"]
pub const STENCIL_FRONT_AND_BACK: Self = Self::FRONT_AND_BACK;
}
#[repr(transparent)]
Expand Down Expand Up @@ -1049,6 +1049,18 @@ vk_bitflags_wrapped!(PipelineLayoutCreateFlags, Flags);
impl PipelineLayoutCreateFlags {}
#[repr(transparent)]
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
#[doc = "<https://www.khronos.org/registry/vulkan/specs/1.2-extensions/man/html/VkPipelineColorBlendStateCreateFlagBits.html>"]
pub struct PipelineColorBlendStateCreateFlags(pub(crate) Flags);
vk_bitflags_wrapped!(PipelineColorBlendStateCreateFlags, Flags);
impl PipelineColorBlendStateCreateFlags {}
#[repr(transparent)]
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
#[doc = "<https://www.khronos.org/registry/vulkan/specs/1.2-extensions/man/html/VkPipelineDepthStencilStateCreateFlagBits.html>"]
pub struct PipelineDepthStencilStateCreateFlags(pub(crate) Flags);
vk_bitflags_wrapped!(PipelineDepthStencilStateCreateFlags, Flags);
impl PipelineDepthStencilStateCreateFlags {}
#[repr(transparent)]
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
#[doc = "<https://www.khronos.org/registry/vulkan/specs/1.2-extensions/man/html/VkVideoCodecOperationFlagBitsKHR.html>"]
pub struct VideoCodecOperationFlagsKHR(pub(crate) Flags);
vk_bitflags_wrapped!(VideoCodecOperationFlagsKHR, Flags);
Expand Down
42 changes: 36 additions & 6 deletions ash/src/vk/const_debugs.rs
Original file line number Diff line number Diff line change
Expand Up @@ -321,6 +321,7 @@ impl fmt::Debug for AccessFlags2KHR {
AccessFlags2KHR::COLOR_ATTACHMENT_READ_NONCOHERENT_EXT.0,
"COLOR_ATTACHMENT_READ_NONCOHERENT_EXT",
),
(AccessFlags2KHR::RESERVED_41_AMD.0, "RESERVED_41_AMD"),
(
AccessFlags2KHR::INVOCATION_MASK_READ_HUAWEI.0,
"INVOCATION_MASK_READ_HUAWEI",
Expand Down Expand Up @@ -1338,6 +1339,7 @@ impl fmt::Debug for DriverId {
Self::MESA_TURNIP => Some("MESA_TURNIP"),
Self::MESA_V3DV => Some("MESA_V3DV"),
Self::MESA_PANVK => Some("MESA_PANVK"),
Self::SAMSUNG_PROPRIETARY => Some("SAMSUNG_PROPRIETARY"),
_ => None,
};
if let Some(x) = name {
Expand Down Expand Up @@ -2817,7 +2819,10 @@ impl fmt::Debug for PipelineCacheHeaderVersion {
}
impl fmt::Debug for PipelineColorBlendStateCreateFlags {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
const KNOWN: &[(Flags, &str)] = &[];
const KNOWN: &[(Flags, &str)] = &[(
PipelineColorBlendStateCreateFlags::RASTERIZATION_ORDER_ATTACHMENT_ACCESS_ARM.0,
"RASTERIZATION_ORDER_ATTACHMENT_ACCESS_ARM",
)];
debug_flags(f, KNOWN, self.0)
}
}
Expand Down Expand Up @@ -2858,12 +2863,12 @@ impl fmt::Debug for PipelineCreateFlags {
),
(PipelineCreateFlags::DERIVATIVE.0, "DERIVATIVE"),
(
PipelineCreateFlags::RASTERIZATION_STATE_FRAGMENT_SHADING_RATE_ATTACHMENT_KHR.0,
"RASTERIZATION_STATE_FRAGMENT_SHADING_RATE_ATTACHMENT_KHR",
PipelineCreateFlags::RENDERING_FRAGMENT_SHADING_RATE_ATTACHMENT_KHR.0,
"RENDERING_FRAGMENT_SHADING_RATE_ATTACHMENT_KHR",
),
(
PipelineCreateFlags::RASTERIZATION_STATE_FRAGMENT_DENSITY_MAP_ATTACHMENT_EXT.0,
"RASTERIZATION_STATE_FRAGMENT_DENSITY_MAP_ATTACHMENT_EXT",
PipelineCreateFlags::RENDERING_FRAGMENT_DENSITY_MAP_ATTACHMENT_EXT.0,
"RENDERING_FRAGMENT_DENSITY_MAP_ATTACHMENT_EXT",
),
(
PipelineCreateFlags::RAY_TRACING_NO_NULL_ANY_HIT_SHADERS_KHR.0,
Expand Down Expand Up @@ -2948,7 +2953,7 @@ impl fmt::Debug for PipelineCreationFeedbackFlagsEXT {
}
impl fmt::Debug for PipelineDepthStencilStateCreateFlags {
fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
const KNOWN: &[(Flags, &str)] = &[];
const KNOWN : & [(Flags , & str)] = & [(PipelineDepthStencilStateCreateFlags :: RASTERIZATION_ORDER_ATTACHMENT_DEPTH_ACCESS_ARM . 0 , "RASTERIZATION_ORDER_ATTACHMENT_DEPTH_ACCESS_ARM") , (PipelineDepthStencilStateCreateFlags :: RASTERIZATION_ORDER_ATTACHMENT_STENCIL_ACCESS_ARM . 0 , "RASTERIZATION_ORDER_ATTACHMENT_STENCIL_ACCESS_ARM")] ;
debug_flags(f, KNOWN, self.0)
}
}
Expand Down Expand Up @@ -4952,6 +4957,9 @@ impl fmt::Debug for StructureType {
Self::PHYSICAL_DEVICE_4444_FORMATS_FEATURES_EXT => {
Some("PHYSICAL_DEVICE_4444_FORMATS_FEATURES_EXT")
}
Self::PHYSICAL_DEVICE_RASTERIZATION_ORDER_ATTACHMENT_ACCESS_FEATURES_ARM => {
Some("PHYSICAL_DEVICE_RASTERIZATION_ORDER_ATTACHMENT_ACCESS_FEATURES_ARM")
}
Self::PHYSICAL_DEVICE_RGBA10X6_FORMATS_FEATURES_EXT => {
Some("PHYSICAL_DEVICE_RGBA10X6_FORMATS_FEATURES_EXT")
}
Expand All @@ -4972,6 +4980,12 @@ impl fmt::Debug for StructureType {
Some("VERTEX_INPUT_ATTRIBUTE_DESCRIPTION_2_EXT")
}
Self::PHYSICAL_DEVICE_DRM_PROPERTIES_EXT => Some("PHYSICAL_DEVICE_DRM_PROPERTIES_EXT"),
Self::PHYSICAL_DEVICE_DEPTH_CLIP_CONTROL_FEATURES_EXT => {
Some("PHYSICAL_DEVICE_DEPTH_CLIP_CONTROL_FEATURES_EXT")
}
Self::PIPELINE_VIEWPORT_DEPTH_CLIP_CONTROL_CREATE_INFO_EXT => {
Some("PIPELINE_VIEWPORT_DEPTH_CLIP_CONTROL_CREATE_INFO_EXT")
}
Self::PHYSICAL_DEVICE_PRIMITIVE_TOPOLOGY_LIST_RESTART_FEATURES_EXT => {
Some("PHYSICAL_DEVICE_PRIMITIVE_TOPOLOGY_LIST_RESTART_FEATURES_EXT")
}
Expand Down Expand Up @@ -5047,6 +5061,10 @@ impl fmt::Debug for StructureType {
Self::QUEUE_FAMILY_GLOBAL_PRIORITY_PROPERTIES_EXT => {
Some("QUEUE_FAMILY_GLOBAL_PRIORITY_PROPERTIES_EXT")
}
Self::PHYSICAL_DEVICE_IMAGE_VIEW_MIN_LOD_FEATURES_EXT => {
Some("PHYSICAL_DEVICE_IMAGE_VIEW_MIN_LOD_FEATURES_EXT")
}
Self::IMAGE_VIEW_MIN_LOD_CREATE_INFO_EXT => Some("IMAGE_VIEW_MIN_LOD_CREATE_INFO_EXT"),
Self::PHYSICAL_DEVICE_MULTI_DRAW_FEATURES_EXT => {
Some("PHYSICAL_DEVICE_MULTI_DRAW_FEATURES_EXT")
}
Expand Down Expand Up @@ -5373,6 +5391,18 @@ impl fmt::Debug for SubpassDescriptionFlags {
SubpassDescriptionFlags::SHADER_RESOLVE_QCOM.0,
"SHADER_RESOLVE_QCOM",
),
(
SubpassDescriptionFlags::RASTERIZATION_ORDER_ATTACHMENT_COLOR_ACCESS_ARM.0,
"RASTERIZATION_ORDER_ATTACHMENT_COLOR_ACCESS_ARM",
),
(
SubpassDescriptionFlags::RASTERIZATION_ORDER_ATTACHMENT_DEPTH_ACCESS_ARM.0,
"RASTERIZATION_ORDER_ATTACHMENT_DEPTH_ACCESS_ARM",
),
(
SubpassDescriptionFlags::RASTERIZATION_ORDER_ATTACHMENT_STENCIL_ACCESS_ARM.0,
"RASTERIZATION_ORDER_ATTACHMENT_STENCIL_ACCESS_ARM",
),
];
debug_flags(f, KNOWN, self.0)
}
Expand Down
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