Add atomics support #211
Add atomics support #211
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dylanmckay
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| @@ -1237,6 +1237,16 @@ isReMaterializable = 1 in | |||
| Requires<[HasSRAM]>; | |||
| } | |||
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| def AtomicLoad8 : Pseudo<(outs GPR8:$rd), | |||
| (ins PTRREGS:$rr), | |||
| "atomic_laod $rd, $rr", | |||
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Have fixed this up and force pushed.
dylanmckay
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| template<> | ||
| bool AVRExpandPseudo::expand<AVR::AtomicLoad8>(Block &MBB, BlockIt MBBI) { | ||
| return expandAtomicBinaryOp(AVR::MOVRdRr, MBB, MBBI); |
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Should we lower this to a MOV or an LD operation? I'm not that familiar with the atomics but 'atomic load' sounds more like a LD...
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You're right, my brain farted. Have got this on a local branch.
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This has now been pushed
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| ; CHECK-NEXT: ldd [[RR2:r[0-9]+]], [[RD2:(X|Y|Z)]]+ | ||
| ; CHECK-NEXT: add [[RR1]], [[TMP:r[0-9]+]] | ||
| ; CHECK-NEXT: adc [[RR2]], [[TMP:r[0-9]+]] | ||
| ; CHECK-NEXT: out 63, r0 |
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This is starting to look really nice 👍
Don't forget to store the result back to %foo though (see http://llvm.org/docs/LangRef.html#atomicrmw-instruction)
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@rjordans did you want to review this? |
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Sure no problem, I was mainly trying to follow how this would be implemented and figured that I could just as well give some suggestions whenever I spot things. I hope you didn't mind. Anyway, I guess you missed my last comment but from looking at the LLVM language reference it seems that the atomicrmw operations require a write-back of the new value as well. It seems like you miss that in the currently generated code. Other than that it looks really nice now. |
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Suggestions and feedback are always appreciated :) I haven't worked with atomics much either so anything is useful.
I didn't notice that before, nice catch! |
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The atomic RMW instructions now store the value back to the original pointer. |
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Have also rebased the branch so it's a bit cleaner. |
This PR adds atomics support to AVR.
Still need to implement
atomic_load_addatomic_cmp_swapatomic_swapatomic_load_subatomic_load_andatomic_load_oratomic_load_xoratomic_load_nandatomic_load_minatomic_load_maxatomic_load_uminatomic_load_umaxatomic_fenceIdeally we should use the AVR RMW instructions (
XCH, etc) when we can. Not a priority though because they aren't well supported.Fixes #197.