Merge branch 'feature/riscv-fixes' into develop

beehive-lab · Mar 27, 2020 · 0ab4793 · 0ab4793
2 parents 21aafb6 + fca42fe
commit 0ab4793
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Showing 4 changed files with 14 additions and 5 deletions.
diff --git a/com.oracle.max.asm/src/com/oracle/max/asm/target/riscv64/RISCV64InstructionDecoder.java b/com.oracle.max.asm/src/com/oracle/max/asm/target/riscv64/RISCV64InstructionDecoder.java
@@ -34,7 +34,7 @@ private static void patchDisp32(byte[] code, int pos, int offset) {
  assert pos + RISCV64MacroAssembler.INSTRUCTION_SIZE *
  RISCV64MacroAssembler.PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS <= code.length;
 
- pos += 4; //skip asm.auipc(scratch, 0);
+ pos += RISCV64MacroAssembler.INSTRUCTION_SIZE; //skip asm.auipc(scratch, 0);
 
  //Nop everything except the asm.auipc(scratch, 0);
  int instruction = RISCV64MacroAssembler.addImmediateHelper(RISCV64.x0, RISCV64.x0, 0);

diff --git a/com.oracle.max.asm/src/com/oracle/max/asm/target/riscv64/RISCV64MacroAssembler.java b/com.oracle.max.asm/src/com/oracle/max/asm/target/riscv64/RISCV64MacroAssembler.java
@@ -26,7 +26,16 @@
 import com.sun.cri.ri.RiRegisterConfig;
 
 public class RISCV64MacroAssembler extends RISCV64Assembler {
- public static final int PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS = 15;
+ /**
+ * Reserved space for worst case scenario.
+ *
+ * <code>
+ * lui x29, %hi(offset)
+ * addi x29, x29, %lo(offset)
+ * add x28, x28, x29
+ * </code>
+ */
+ public static final int PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS = 3;
  public static final int INSTRUCTION_SIZE = 4;
 
  public static final int CALL_TRAMPOLINE_INSTRUCTIONS = 6;

diff --git a/com.oracle.max.vm.ext.t1x/src/com/oracle/max/vm/ext/t1x/riscv64/RISCV64T1XCompilation.java b/com.oracle.max.vm.ext.t1x/src/com/oracle/max/vm/ext/t1x/riscv64/RISCV64T1XCompilation.java
@@ -918,8 +918,8 @@ public static int[] findDataPatchPosns(MaxTargetMethod source, int dispFromCodeS
  }
  }
  asm.add(scratch, scratch, scratch1);
- // movInstr.length + RISCV64MacroAssembler.INSTRUCTION_SIZE to account for the mov32bitConstant and add above.
- asm.nop(RISCV64MacroAssembler.PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS - (movInstr.length + RISCV64MacroAssembler.INSTRUCTION_SIZE));
+ // movInstr.length + 1 to account for the mov32bitConstant and add above.
+ asm.nop(RISCV64MacroAssembler.PLACEHOLDER_INSTRUCTIONS_FOR_LONG_OFFSETS - (movInstr.length + 1));
  asm.ldru(64, reg, RISCV64Address.createBaseRegisterOnlyAddress(scratch));
  byte[] patternMov32BitConstant = asm.codeBuffer.close(true);
 

diff --git a/com.sun.c1x/src/com/sun/c1x/target/riscv64/RISCV64LIRAssembler.java b/com.sun.c1x/src/com/sun/c1x/target/riscv64/RISCV64LIRAssembler.java
@@ -1621,7 +1621,7 @@ public void emitXirInstructions(LIRXirInstruction xir, XirInstruction[] instruct
  int afterLea = masm.codeBuffer.position();
  masm.codeBuffer.setPosition(beforeLea);
  masm.auipc(dst, 0);
- masm.mov64BitConstant(scratchRegister, beforeLea - afterLea);
+ masm.mov32BitConstant(scratchRegister, beforeLea - afterLea);
  masm.add(dst, dst, scratchRegister);
  masm.codeBuffer.setPosition(afterLea);
  break;