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Cache Cargo.toml read result if successful #20
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proc-macros should be deterministic, and although it shouldn't matter in this specific case, using HashMaps is an easy way to introduce non-determinism (through iteration order). toml's Map type is backed by either BTreeMap or IndexMap depending on the activated features, both of which are fully deterministic.
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Thank you! Looks like some good results! Would be good that you try this one improvement that I have proposed, looking forward to the results!
src/lib.rs
Outdated
struct Cache { | ||
manifest_dir: String, | ||
manifest_path: PathBuf, | ||
manifest: Table, |
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Before we merge this, could you try to directly cache all crate names. So, have a hash table here that maps from crate name to crate name in the cargo file? By all I mean all crates that are referenced in the cargo.toml. May also brings some improvements?
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I implemented this. I think there is actually a behavioral change though: When you have multiple dependencies on the same package, previously the first one in the order they were searched was used to determine the crate name, now it's the last one in the order they are iterated to build the package > crate mapping (because, AFAIK, when collect()
ing a BTreeMap
the last occurrence of any given key "wins").
I'm pretty sure those two orderings are the same the way I implemented it now, so when a package is depended on with different crate names, a different one will be returned from crate_name
now. I think assume this acceptable, just wanted to spell it out.
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Yeah that sounds right, but this is also some very niche use case that wasn't tested before.
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BTW, did that improve the performance?
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I can benchmark again next week.
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Would be nice
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This change doesn't seem to have a measureable impact on performance.
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Thank you! :)
Closes #19.
Within ruma-client-api, this reduces compile time of
cargo clean && cargo check --features client
from around 20.5s to around 19s on my machine. Out of that time, around 8.5s are for dependencies that don't use proc-macro-crate, so the real improvement is probably closer to 12s => 10.5s (12.5%).