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native/platform: Backported the soft-start logic to the oldest native…
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… hardware that can support the feature
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dragonmux committed Sep 11, 2023
1 parent f49875b commit 3e24734
Showing 1 changed file with 10 additions and 7 deletions.
17 changes: 10 additions & 7 deletions src/platforms/native/platform.c
Original file line number Diff line number Diff line change
Expand Up @@ -210,8 +210,8 @@ void platform_init(void)
gpio_set_mode(PWR_BR_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, PWR_BR_PIN);
}

/* Configure Timer 1 Channel 3N to allow tpwr to be soft start on hw6 */
if (platform_hwversion() >= 6) {
/* Configure Timer 1 Channel 3N to allow tpwr to be soft start on hw1+ */
if (platform_hwversion() >= 1) {
/* The pin mapping is a secondary mapping for the pin. We need to enable that. */
gpio_primary_remap(AFIO_MAPR_SWJ_CFG_FULL_SWJ, AFIO_MAPR_TIM1_REMAP_PARTIAL_REMAP);
/*
Expand Down Expand Up @@ -303,8 +303,8 @@ void platform_target_set_power(const bool power)
{
if (platform_hwversion() <= 0)
return;
/* If we're on hw6 or newer, and are turning the power on */
if (platform_hwversion() >= 6 && power) {
/* If we're on hw1 or newer, and are turning the power on */
if (power) {
/* Configure the pin to be driven by the timer */
gpio_set_mode(PWR_BR_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, PWR_BR_PIN);
timer_clear_flag(TIM1, TIM_SR_UIF);
Expand All @@ -321,11 +321,14 @@ void platform_target_set_power(const bool power)
/* Set the pin state */
gpio_set_val(PWR_BR_PORT, PWR_BR_PIN, !power);
/*
* If we're turning power on and running hw6+, now configure the pin back over to GPIO and
* If we're turning power on and running hw1+, now configure the pin back over to GPIO and
* reset state timer for the next request
*/
if (platform_hwversion() >= 6 && power) {
gpio_set_mode(PWR_BR_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, PWR_BR_PIN);
if (power) {
if (platform_hwversion() == 1)
gpio_set_mode(PWR_BR_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, PWR_BR_PIN);
else
gpio_set_mode(PWR_BR_PORT, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_OPENDRAIN, PWR_BR_PIN);
timer_set_oc_value(TIM1, TIM_OC3, 0U);
}
}
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