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Revert "cortexa: Avoid resuming *not halted* cores"
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This reverts commit fc93f6fa0df5d618c4c2027f52a003cba86ac386.
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ALTracer committed Sep 22, 2023
1 parent 73e8ab7 commit 9cad825
Showing 1 changed file with 1 addition and 6 deletions.
7 changes: 1 addition & 6 deletions src/target/cortexa.c
Original file line number Diff line number Diff line change
Expand Up @@ -927,11 +927,6 @@ static target_halt_reason_e cortexa_halt_poll(target_s *t, target_addr_t *watch)
void cortexa_halt_resume(target_s *t, bool step)
{
cortexa_priv_s *priv = t->priv;

uint32_t dbgdscr = cortex_dbg_read32(t, CORTEXAR_DBG_DSCR);
if (!(dbgdscr & CORTEXAR_DBG_DSCR_HALTED)) /* Not halted */
return;

/* Set breakpoint comparator for single stepping if needed */
if (step) {
uint32_t addr = priv->reg_cache.r[15];
Expand All @@ -951,7 +946,7 @@ void cortexa_halt_resume(target_s *t, bool step)
cortexar_run_insn(t, MCR | ICIALLU); /* invalidate cache */

/* Disable DBGITR. Not sure why, but RRQ is ignored otherwise. */
dbgdscr = cortex_dbg_read32(t, CORTEXAR_DBG_DSCR);
uint32_t dbgdscr = cortex_dbg_read32(t, CORTEXAR_DBG_DSCR);
if (step)
dbgdscr |= DBGDSCR_INTDIS;
else
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