github: Further refined the PR workflow to get RTT properly tested

blackmagic-debug · Nov 28, 2023 · d934b21 · d934b21
1 parent 45314b1
commit d934b21
Showing 1 changed file with 62 additions and 13 deletions.
diff --git a/.github/workflows/build-pr.yml b/.github/workflows/build-pr.yml
@@ -225,28 +225,76 @@ jobs:
 
   # This workflow tests the experimental Meson build system
   build-linux-meson:
+    # Name the job more appropriately so we can tell which windows and which MinGW ABI is in use
+    name: 'build-linux (${{ matrix.os.name }}, ${{ matrix.probe.name }}, rtt ${{ matrix.probe.rtt }})'
     # The type of runner that the job will run on
-    runs-on: ubuntu-20.04
+    runs-on: ${{ matrix.os.id }}
 
     # We define a matrix of GCCs and OSes to build against so we can cover a variety of
     # suitable compilation environments and early discover issues. The `build-and-upload`
     # workflow contains an extended set.
     strategy:
       matrix:
+        os:
+          - {id: ubuntu-20.04, name: focal}
         arm-compiler:
           - '12.2.Rel1'
         probe:
-          - {name: '96b_carbon', targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'bluepill', targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'f072', targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'f3', targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'f4discovery', targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'hydrabus', targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'launchpad-icdi', targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'native', targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'stlink', targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'stlinkv3', targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
-          - {name: 'swlink', targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti'}
+          - {
+            name: '96b_carbon',
+            targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti,xilinx',
+            rtt: true,
+          }
+          - {
+            name: 'bluepill',
+            targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti',
+            rtt: false,
+          }
+          - {
+            name: 'f072',
+            targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti,xilinx',
+            rtt: false,
+          }
+          - {
+            name: 'f3',
+            targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti,xilinx',
+            rtt: true,
+          }
+          - {
+            name: 'f4discovery',
+            targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti,xilinx',
+            rtt: true,
+          }
+          - {
+            name: 'hydrabus',
+            targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti,xilinx',
+            rtt: true,
+          }
+          - {
+            name: 'launchpad-icdi',
+            targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti,xilinx',
+            rtt: true,
+          }
+          - {
+            name: 'native',
+            targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti',
+            rtt: false,
+          }
+          - {
+            name: 'stlink',
+            targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti',
+            rtt: false,
+          }
+          - {
+            name: 'stlinkv3',
+            targets: 'cortexar,cortexm,riscv32,riscv64,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti,xilinx',
+            rtt: true,
+          }
+          - {
+            name: 'swlink',
+            targets: 'cortexm,efm,hc32,lpc,nrf,nxp,renesas,rp,sam,stm,ti',
+            rtt: false,
+          }
       fail-fast: false
 
     # Steps represent a sequence of tasks that will be executed as part of the job
@@ -294,7 +342,8 @@ jobs:
       # Build the firmware for all platform variants (currently available)
       - name: Build
         run: |
-          meson setup build --cross-file cross-file/arm-none-eabi.ini -Dprobe=${{ matrix.probe.name }} -Dtargets=${{ matrix.probe.targets }}
+          meson setup build --cross-file cross-file/arm-none-eabi.ini -Dprobe=${{ matrix.probe.name }} \
+            -Dtargets=${{ matrix.probe.targets }} -Drtt_support=${{ matrix.probe.rtt }}
           meson compile -C build
 
   size-diff: