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Cortex-M: Temptative fix for watchpoints so they work on ARMv8-M cores (eg Cortex-M33) #2008

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Dec 4, 2024
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32 changes: 27 additions & 5 deletions src/target/cortexm.c
Original file line number Diff line number Diff line change
Expand Up @@ -1063,6 +1063,25 @@ static uint32_t cortexm_dwt_func(target_s *target, target_breakwatch_e type)
}
}

static uint32_t cortexm_dwtv2_func(target_breakwatch_e type, size_t len)
{
uint32_t value = CORTEXM_DWTv2_FUNC_ACTION_DEBUG_EVENT | CORTEXM_DWTv2_FUNC_LEN_VALUE(len);
switch (type) {
case TARGET_WATCH_WRITE:
value |= CORTEXM_DWTv2_FUNC_MATCH_WRITE;
break;
case TARGET_WATCH_READ:
value |= CORTEXM_DWTv2_FUNC_MATCH_READ;
break;
case TARGET_WATCH_ACCESS:
value |= CORTEXM_DWTv2_FUNC_MATCH_ACCESS;
break;
default:
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return 0U;
}
return value;
}

static int cortexm_breakwatch_set(target_s *target, breakwatch_s *breakwatch)
{
cortexm_priv_s *priv = target->priv;
Expand Down Expand Up @@ -1104,11 +1123,14 @@ static int cortexm_breakwatch_set(target_s *target, breakwatch_s *breakwatch)
return -1;

priv->base.watchpoints_mask |= 1U << i;

target_mem32_write32(target, CORTEXM_DWT_COMP(i), val);
target_mem32_write32(target, CORTEXM_DWT_MASK(i), cortexm_dwt_mask(breakwatch->size));
target_mem32_write32(target, CORTEXM_DWT_FUNC(i), cortexm_dwt_func(target, breakwatch->type));

if ((target->target_options & CORTEXM_TOPT_FLAVOUR_V8M)) {
target_mem32_write32(target, CORTEXM_DWT_COMP(i), val);
target_mem32_write32(target, CORTEXM_DWT_FUNC(i), cortexm_dwtv2_func(breakwatch->type, breakwatch->size));
} else {
target_mem32_write32(target, CORTEXM_DWT_COMP(i), val);
target_mem32_write32(target, CORTEXM_DWT_MASK(i), cortexm_dwt_mask(breakwatch->size));
target_mem32_write32(target, CORTEXM_DWT_FUNC(i), cortexm_dwt_func(target, breakwatch->type));
}
breakwatch->reserved[0] = i;
return 0;
default:
Expand Down
7 changes: 7 additions & 0 deletions src/target/cortexm.h
Original file line number Diff line number Diff line change
Expand Up @@ -164,6 +164,13 @@ extern unsigned cortexm_wait_timeout;
#define CORTEXM_DWT_FUNC_FUNC_READ (5U << 0U)
#define CORTEXM_DWT_FUNC_FUNC_WRITE (6U << 0U)
#define CORTEXM_DWT_FUNC_FUNC_ACCESS (7U << 0U)
/* Variant for DWTv2 */
#define CORTEXM_DWTv2_FUNC_MATCH_READ (6U << 0U)
#define CORTEXM_DWTv2_FUNC_MATCH_WRITE (5U << 0U)
#define CORTEXM_DWTv2_FUNC_MATCH_ACCESS (4U << 0U)
#define CORTEXM_DWTv2_FUNC_ACTION_TRIGGER (0U << 4U)
#define CORTEXM_DWTv2_FUNC_ACTION_DEBUG_EVENT (1U << 4U)
#define CORTEXM_DWTv2_FUNC_LEN_VALUE(len) (((len) >> 1) << 10U)

#define CORTEXM_XPSR_THUMB (1U << 24U)
#define CORTEXM_XPSR_EXCEPTION_MASK 0x0000001fU
Expand Down
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