Blarney is a Haskell library for hardware description that builds a range of HDL abstractions on top of a small set of pure functional circuit primitives. It is a modern variant of Lava using many of the latest features of GHC. Some aspects of the library are also inspired by Bluespec, such as first-class actions and method-based interfaces.

Prerequisites

We’ll need Verilator and GHC 9.2.1 or later.

On Ubuntu 20.04, we can do:

$ sudo apt install verilator libgmp-dev

For GHC 9.2.1 or later, ghcup can be used.

Quick start

To clone the repo:

$ git clone --recursive https://github.com/blarney-lang/blarney

To simulate the Sorter example from Blarney’s Examples directory:

$ cd blarney/Examples/Sorter
$ make                  # Build the example using GHC
$ ./Sorter              # Generate Verilog for the example
$ cd Sorter-Verilog     # Go to the generated Verilog
$ make                  # Compile the generated Verilog using Verilator
$ ./Sorter              # Simulate the generated Verilog

You should see the output:

sort [3,4,1,0,2] = [0,1,2,3,4]

To run the regression test suite:

$ cd blarney/Test
$ ./test.sh --run-all

To start development of your own Blarney application or library, take a look at the Blarney template project.

Documentation

See Blarney by Example, our introduction to Blarney, which supplements the Haddock docs.

Applications

Our current list of applications developed using Blarney:

• Actora: A 3-stage stack processor that runs code written a subset of Erlang. It has higher performance density than Intel’s register-based NIOS-II core for compiled Erlang code.

• SIMTight: A CHERI-enabled RISC-V GPGPU with dynamic scalarisation features and high performance density on Intel’s Stratix 10 FPGA.

• Five: A formally verified implementation of the classic 5-stage RISC pipeline as an abstract component, largely independent of any specific instruction set.

• FiveAlive: A proof-of-concept instantiation of the Five pipeline with the RISC-V instruction set to give a simple 32-bit microcontroller.