MachineEnv generic lifetime

src/checker.rs

@@ -430,7 +430,7 @@ impl CheckerState {
         alloc: Allocation,
         val: &CheckerValue,
         allocs: &[Allocation],
-        checker: &Checker<'a, F>,
+        checker: &Checker<'a, '_, F>,
     ) -> Result<(), CheckerError> {
         if alloc == Allocation::none() {
             return Err(CheckerError::MissingAllocation { inst, op });
@@ -465,7 +465,7 @@ impl CheckerState {
         &self,
         pos: InstPosition,
         checkinst: &CheckerInst,
-        checker: &Checker<'a, F>,
+        checker: &Checker<'a, '_, F>,
     ) -> Result<(), CheckerError> {
         let default_val = Default::default();
         match checkinst {
@@ -627,7 +627,7 @@ impl CheckerState {
         op: Operand,
         alloc: Allocation,
         allocs: &[Allocation],
-        checker: &Checker<'a, F>,
+        checker: &Checker<'a, '_, F>,
     ) -> Result<(), CheckerError> {
         match op.constraint() {
             OperandConstraint::Any => {}
@@ -691,21 +691,21 @@ pub(crate) enum CheckerInst {
 }
 
 #[derive(Debug)]
-pub struct Checker<'a, F: Function> {
+pub struct Checker<'a, 'r, F: Function> {
     f: &'a F,
     bb_in: FxHashMap<Block, CheckerState>,
     bb_insts: FxHashMap<Block, Vec<CheckerInst>>,
     edge_insts: FxHashMap<(Block, Block), Vec<CheckerInst>>,
-    machine_env: &'a MachineEnv,
+    machine_env: &'a MachineEnv<'r>,
     stack_pregs: PRegSet,
 }
 
-impl<'a, F: Function> Checker<'a, F> {
+impl<'a, 'r, F: Function> Checker<'a, 'r, F> {
     /// Create a new checker for the given function, initializing CFG
     /// info immediately.  The client should call the `add_*()`
     /// methods to add abstract instructions to each BB before
     /// invoking `run()` to check for errors.
-    pub fn new(f: &'a F, machine_env: &'a MachineEnv) -> Checker<'a, F> {
+    pub fn new(f: &'a F, machine_env: &'a MachineEnv<'r>) -> Checker<'a, 'r, F> {
         let mut bb_in = FxHashMap::default();
         let mut bb_insts = FxHashMap::default();
         let mut edge_insts = FxHashMap::default();

src/fastalloc/tests.rs

@@ -140,7 +140,7 @@ impl RealFunction {
     }
 }
 
-fn mach_env(no_of_regs: usize) -> MachineEnv {
+fn mach_env(no_of_regs: usize) -> MachineEnv<'static> {
     MachineEnv {
         preferred_regs_by_class: [
             Vec::leak(

src/fuzzing/func.rs

@@ -624,30 +624,32 @@ impl core::fmt::Debug for Func {
     }
 }
 
-pub fn machine_env() -> MachineEnv {
-    fn regs(r: core::ops::Range<usize>, c: RegClass) -> Vec<PReg> {
-        r.map(|i| PReg::new(i, c)).collect()
+pub fn machine_env() -> MachineEnv<'static> {
+    fn regs(r: core::ops::Range<usize>, c: RegClass) -> &'static [PReg] {
+        Vec::leak(r.map(|i| PReg::new(i, c)).collect())
     }
-    let preferred_regs_by_class: [Vec<PReg>; 3] = [
+    let preferred_regs_by_class: [&'static [PReg]; 3] = [
         regs(0..24, RegClass::Int),
         regs(0..24, RegClass::Float),
         regs(0..24, RegClass::Vector),
     ];
-    let non_preferred_regs_by_class: [Vec<PReg>; 3] = [
+    let non_preferred_regs_by_class: [&'static [PReg]; 3] = [
         regs(24..32, RegClass::Int),
         regs(24..32, RegClass::Float),
         regs(24..32, RegClass::Vector),
     ];
     let scratch_by_class: [Option<PReg>; 3] = [None, None, None];
-    let fixed_stack_slots = (32..63)
-        .flat_map(|i| {
-            [
-                PReg::new(i, RegClass::Int),
-                PReg::new(i, RegClass::Float),
-                PReg::new(i, RegClass::Vector),
-            ]
-        })
-        .collect();
+    let fixed_stack_slots = Vec::leak(
+        (32..63)
+            .flat_map(|i| {
+                [
+                    PReg::new(i, RegClass::Int),
+                    PReg::new(i, RegClass::Float),
+                    PReg::new(i, RegClass::Vector),
+                ]
+            })
+            .collect(),
+    );
     // Register 63 is reserved for use as a fixed non-allocatable register.
     MachineEnv {
         preferred_regs_by_class,

src/ion/data_structures.rs

@@ -497,27 +497,27 @@ impl Ctx {
     }
 }
 
-pub struct Env<'a, F: Function> {
+pub struct Env<'a, 'r, F: Function> {
     pub func: &'a F,
-    pub env: &'a MachineEnv,
+    pub env: &'a MachineEnv<'r>,
     pub ctx: &'a mut Ctx,
 }
 
-impl<'a, F: Function> Deref for Env<'a, F> {
+impl<'a, F: Function> Deref for Env<'a, '_, F> {
     type Target = Ctx;
 
     fn deref(&self) -> &Self::Target {
         self.ctx
     }
 }
 
-impl<'a, F: Function> DerefMut for Env<'a, F> {
+impl<'a, F: Function> DerefMut for Env<'a, '_, F> {
     fn deref_mut(&mut self) -> &mut Self::Target {
         self.ctx
     }
 }
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     /// Get the VReg (with bundled RegClass) from a vreg index.
     #[inline]
     pub fn vreg(&self, index: VRegIndex) -> VReg {

src/ion/dump.rs

@@ -7,7 +7,7 @@ use alloc::{string::String, vec::Vec};
 use super::Env;
 use crate::{Block, Function, ProgPoint};
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     pub fn dump_state(&self) {
         trace!("Bundles:");
         for (i, b) in self.bundles.iter().enumerate() {

src/ion/liveranges.rs

@@ -94,7 +94,7 @@ impl core::ops::Add<SpillWeight> for SpillWeight {
     }
 }
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     pub fn create_pregs_and_vregs(&mut self) {
         // Create PRegs from the env.
         self.pregs.resize(

src/ion/merge.rs

@@ -22,7 +22,7 @@ use crate::{
 };
 use alloc::format;
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     pub fn merge_bundles(&mut self, from: LiveBundleIndex, to: LiveBundleIndex) -> bool {
         if from == to {
             // Merge bundle into self -- trivial merge.

src/ion/mod.rs

@@ -35,8 +35,8 @@ pub(crate) mod dump;
 pub(crate) mod moves;
 pub(crate) mod spill;
 
-impl<'a, F: Function> Env<'a, F> {
-    pub(crate) fn new(func: &'a F, env: &'a MachineEnv, ctx: &'a mut Ctx) -> Self {
+impl<'a, 'r, F: Function> Env<'a, 'r, F> {
+    pub(crate) fn new(func: &'a F, env: &'a MachineEnv<'r>, ctx: &'a mut Ctx) -> Self {
         let ninstrs = func.num_insts();
         let nblocks = func.num_blocks();
 

src/ion/moves.rs

@@ -33,7 +33,7 @@ use alloc::vec::Vec;
 use hashbrown::hash_map::Entry;
 use smallvec::{smallvec, SmallVec};
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     pub fn is_start_of_block(&self, pos: ProgPoint) -> bool {
         let block = self.ctx.cfginfo.insn_block[pos.inst().index()];
         pos == self.ctx.cfginfo.block_entry[block.index()]
@@ -171,7 +171,7 @@ impl<'a, F: Function> Env<'a, F> {
         //   and moves go at start of `to`.
         #[inline(always)]
         fn choose_move_location<'a, F: Function>(
-            env: &Env<'a, F>,
+            env: &Env<'a, '_, F>,
             from: Block,
             to: Block,
         ) -> (ProgPoint, InsertMovePrio) {
@@ -787,7 +787,7 @@ impl<'a, F: Function> Env<'a, F> {
         let mut redundant_moves = RedundantMoveEliminator::default();
 
         fn redundant_move_process_side_effects<'a, F: Function>(
-            this: &Env<'a, F>,
+            this: &Env<'a, '_, F>,
             redundant_moves: &mut RedundantMoveEliminator,
             from: ProgPoint,
             to: ProgPoint,

src/ion/process.rs

@@ -36,7 +36,7 @@ pub enum AllocRegResult<'a> {
     ConflictHighCost,
 }
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     pub fn process_bundles(&mut self) -> Result<(), RegAllocError> {
         while let Some((bundle, reg_hint)) = self.ctx.allocation_queue.pop() {
             self.ctx.output.stats.process_bundle_count += 1;

src/ion/reg_traversal.rs

@@ -14,8 +14,8 @@ use crate::{MachineEnv, PReg, RegClass};
 ///   usage, these consist of caller-save and callee-save registers
 ///   respectively, to minimize clobber-saves; but they need not.)
 
-pub struct RegTraversalIter<'a> {
-    env: &'a MachineEnv,
+pub struct RegTraversalIter<'a, 'r> {
+    env: &'a MachineEnv<'r>,
     class: usize,
     hints: [Option<PReg>; 2],
     hint_idx: usize,
@@ -27,9 +27,9 @@ pub struct RegTraversalIter<'a> {
     fixed: Option<PReg>,
 }
 
-impl<'a> RegTraversalIter<'a> {
+impl<'a, 'r> RegTraversalIter<'a, 'r> {
     pub fn new(
-        env: &'a MachineEnv,
+        env: &'a MachineEnv<'r>,
         class: RegClass,
         hint_reg: PReg,
         hint2_reg: PReg,
@@ -78,7 +78,7 @@ impl<'a> RegTraversalIter<'a> {
     }
 }
 
-impl<'a> core::iter::Iterator for RegTraversalIter<'a> {
+impl<'a> core::iter::Iterator for RegTraversalIter<'a, '_> {
     type Item = PReg;
 
     fn next(&mut self) -> Option<PReg> {

src/ion/requirement.rs

@@ -98,7 +98,7 @@ impl Requirement {
     }
 }
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     #[inline(always)]
     pub fn requirement_from_operand(&self, op: Operand) -> Requirement {
         match op.constraint() {

src/ion/spill.rs

@@ -18,7 +18,7 @@ use super::{
 };
 use crate::{Allocation, Function, SpillSlot};
 
-impl<'a, F: Function> Env<'a, F> {
+impl<'a, F: Function> Env<'a, '_, F> {
     pub fn try_allocating_regs_for_spilled_bundles(&mut self) {
         trace!("allocating regs for spilled bundles");
         let mut scratch = core::mem::take(&mut self.ctx.scratch_conflicts);

src/lib.rs

@@ -334,7 +334,7 @@ impl Iterator for PRegSetIter {
     }
 }
 
-impl From<&MachineEnv> for PRegSet {
+impl From<&MachineEnv<'_>> for PRegSet {
     fn from(env: &MachineEnv) -> Self {
         let mut res = Self::default();
 
@@ -1441,14 +1441,13 @@ impl<'a> Iterator for OutputIter<'a> {
 /// of `Vec`s. If your use case depends on dynamically creating the registers lists, consider
 /// `[Vec::leak`].
 #[derive(Clone, Debug)]
-#[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
-pub struct MachineEnv {
+pub struct MachineEnv<'a> {
     /// Preferred physical registers for each class. These are the
     /// registers that will be allocated first, if free.
     ///
     /// If an explicit scratch register is provided in `scratch_by_class` then
     /// it must not appear in this list.
-    pub preferred_regs_by_class: [&'static [PReg]; 3],
+    pub preferred_regs_by_class: [&'a [PReg]; 3],
 
     /// Non-preferred physical registers for each class. These are the
     /// registers that will be allocated if a preferred register is
@@ -1457,7 +1456,7 @@ pub struct MachineEnv {
     ///
     /// If an explicit scratch register is provided in `scratch_by_class` then
     /// it must not appear in this list.
-    pub non_preferred_regs_by_class: [&'static [PReg]; 3],
+    pub non_preferred_regs_by_class: [&'a [PReg]; 3],
 
     /// Optional dedicated scratch register per class. This is needed to perform
     /// moves between registers when cyclic move patterns occur. The
@@ -1482,7 +1481,7 @@ pub struct MachineEnv {
     ///
     /// `PReg`s in this list cannot be used as an allocatable or scratch
     /// register.
-    pub fixed_stack_slots: &'static [PReg],
+    pub fixed_stack_slots: &'a [PReg],
 }
 
 /// The output of the register allocator.