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Cranelift: extra movdqa
when lowering icmp
#3945
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This may be similar to #3744. |
With the new regalloc the current test looks like: wasmtime/cranelift/filetests/filetests/isa/x64/simd-comparison-legalize.clif Lines 47 to 49 in f85047b
I'm not familiar enough with these instructions to know whether this is fixed though (there's still a single movdqa) |
I mean... this just looks wrong: I can never quite remember Cranelift's order of operands when using the x64 backend but our use of
But even this is a bit silly because those SIMD instructions aren't really being used in their three-operand form. @alexcrichton, I think this issue is fixed though 😁. The extra move is gone but we should resolve this debug output question... |
@abrown the output of
so this looks right in actuality (result is put in The extra move is indeed elided now, so I think we can close this particular issue. |
The pretty-printing had swapped dst and src2; this was introduced when we moved to RA2 (sorry about that! IMHO we should do something to automate the mapping between regalloc arg collection and pretty printing/emission). `src2` comes at the end because it has a variable number of register mentions; this is in line with how many of the other inst formats work. Actual emitted code was never incorrect, just the pretty-printing. Updated test golden outputs look correct to me now, including the one that we saw was incorrect in bytecodealliance#3945.
The pretty-printing had swapped dst and src2; this was introduced when we moved to RA2 (sorry about that! IMHO we should do something to automate the mapping between regalloc arg collection and pretty printing/emission). `src2` comes at the end because it has a variable number of register mentions; this is in line with how many of the other inst formats work. Actual emitted code was never incorrect, just the pretty-printing. Updated test golden outputs look correct to me now, including the one that we saw was incorrect in #3945.
#3886 ports CLIF
icmp
operations to ISLE but in the process added new, unnecessary moves to the lowering:wasmtime/cranelift/filetests/filetests/isa/x64/simd-comparison-legalize.clif
Lines 61 to 64 in e92cbfb
The two initial
movdqa
instructions are not needed with the proper use of registers; my current thinking is that ISLE's move elision may not be working as it should but this could be due to re-ordering of operands in a lowering rule that ISLE cannot resolve.The text was updated successfully, but these errors were encountered: