MachInst backend: pass through SourceLoc information. #1575
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(To be clear, I only commented the third commit which is passing SourceLoc information) |
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Thanks! Updated, PTAL.
Sure, that'd be useful metadata as well; but it seems there's no downstream consumer of that at the moment? I suppose it might be better to wait until we have a need for it (or build out more detailed debuginfo infra)... |
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That would be https://github.com/bjorn3/rustc_codegen_cranelift/issues/937, though in case of the prologue I will likely want to include argument stores generated by cg_clif. |
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@bjorn3 OK, that seems like a reasonable addition. If you don't mind, I think we should postpone that for a followup PR, so that we can land this and get to full test correctness first. |
This change adds SourceLoc information per instruction in a `VCode<Inst>` container, and keeps this information up-to-date across register allocation and branch reordering. The information is initially collected during instruction lowering, eventually collected on the MachSection, and finally provided to the environment that wraps the codegen crate for wasmtime.
Previously, the SourceLoc information transferred in `VCode` only included PC-spans for non-default SourceLocs. I realized that the invariant we're supposed to keep here is that every PC is covered; if no source information, just use `SourceLoc::default()`. This was spurred by @bjorn3's comment in bytecodealliance#1575 (thanks!).
Previously, the SourceLoc information transferred in `VCode` only included PC-spans for non-default SourceLocs. I realized that the invariant we're supposed to keep here is that every PC is covered; if no source information, just use `SourceLoc::default()`. This was spurred by @bjorn3's comment in bytecodealliance#1575 (thanks!).
Previously, the SourceLoc information transferred in `VCode` only included PC-spans for non-default SourceLocs. I realized that the invariant we're supposed to keep here is that every PC is covered; if no source information, just use `SourceLoc::default()`. This was spurred by @bjorn3's comment in bytecodealliance#1575 (thanks!).
This change adds SourceLoc information per instruction in a
VCode<Inst>container, and keeps this information up-to-date across register allocation
and branch reordering. The information is initially collected during
instruction lowering, eventually collected on the MachSection, and finally
provided to the environment that wraps the codegen crate for wasmtime.
This PR is based on top of #1570 and #1571 (part of a series fixing tests).
This PR depends on bytecodealliance/regalloc.rs#50, a change to the register
allocator to provide instruction-granularity info on the rewritten
instruction stream (rather than block-granularity). I have not yet
updated
cranelift/codegen/Cargo.toml; we will need to land that PRand do a release first.
With the prior PRs applied as well, quite a few more unit tests pass;
the exclusion list in #1526 should be updated if this PR lands first.
Addresses part of #1523 (debug info), though debug info consists of
more than just source-location mapping.