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x64 backend: fix fpcmp to avoid load-op merging. #3934

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Mar 16, 2022
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6 changes: 4 additions & 2 deletions cranelift/codegen/src/isa/x64/inst.isle
Original file line number Diff line number Diff line change
Expand Up @@ -1528,9 +1528,11 @@
;; `clif.isle`).
(decl fpcmp (Value Value) ProducesFlags)
(rule (fpcmp src1 @ (value_type $F32) src2)
(xmm_cmp_rm_r (SseOpcode.Ucomiss) (put_in_xmm_mem src1) (put_in_xmm src2)))
;; N.B.: cmp can be generated more than once, so cannot do a
;; load-op merge. So `put_in_xmm` for src1, not `put_in_xmm_mem`.
(xmm_cmp_rm_r (SseOpcode.Ucomiss) (put_in_xmm src1) (put_in_xmm src2)))
(rule (fpcmp src1 @ (value_type $F64) src2)
(xmm_cmp_rm_r (SseOpcode.Ucomisd) (put_in_xmm_mem src1) (put_in_xmm src2)))
(xmm_cmp_rm_r (SseOpcode.Ucomisd) (put_in_xmm src1) (put_in_xmm src2)))

;; Helper for creating `test` instructions.
(decl test (OperandSize GprMemImm Gpr) ProducesFlags)
Expand Down
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
src/clif.isle 9ea75a6f790b5c03
src/prelude.isle b2bc986bcbbbb77
src/isa/x64/inst.isle 40f495d3ca5ae547
src/isa/x64/inst.isle cdd292107fb36cf
src/isa/x64/lower.isle c049f7d36db0e0fb
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