[WIP / RFC] Cranelift: Basic support for EGraph roundtripping.

Cargo.toml

@@ -140,3 +140,6 @@ harness = false
 [[bench]]
 name = "call"
 harness = false
+
+[profile.release]
+debug = true

TODO

@@ -0,0 +1,37 @@
+- all simple_preopt
+
+- cprop for floating-point
+- strength reduction
+- branch folding
+
+- legalization
+ - replace `op_imm` ops with `op` (legalization)
+ - heap, table, ...
+ - show dedup of parts of heap addr computation
+ - i128 -> i64 narrowing?
+
+- perf ideas
+ - keep Insts (side-effecting ops) in DFG, and just rewrite args and
+ attach new results when elaborating.
+
+- code quality
+ - strength reduction for mul/div/rem
+ - analyses: demanded bits, defined bits
+ - more legalizations of pseudoinsts in mid-end, to allow opts
+ - handle amodes this way too?
+ - in lowering, don't generate new adds; just take pieces of toplevel add
+ - then rewrite in mid-end to reassociate as needed
+ - amodes
+ - aarch64: better to do reg+imm with add-with-sext for heap base +
+ wasm ptr
+ - aarch64 and x64: don't gen new adds during lowering; instead
+ nudge things in right direction in mid-end and just match up the
+ tree during lowering
+ - redundant flags uses: reconsider iflags?
+
+- features
+ - support non-pure nodes in rewrite as well?
+ - optimize once before adding to side_effects list
+ - handle varargs for calls, branches
+ - abstract the notion of an analysis; use for loop-depth
+ - use computed loop-depth when elaborating, rather than recomputing

cranelift/codegen/Cargo.toml

@@ -16,6 +16,7 @@ edition = "2021"
 cranelift-codegen-shared = { path = "./shared", version = "0.85.0" }
 cranelift-entity = { path = "../entity", version = "0.85.0" }
 cranelift-bforest = { path = "../bforest", version = "0.85.0" }
+cranelift-egraph = { path = "../egraph", version = "0.85.0" }
 hashbrown = { version = "0.11", optional = true }
 target-lexicon = "0.12"
 log = { version = "0.4.6", default-features = false }

cranelift/codegen/build.rs

@@ -177,9 +177,19 @@ fn get_isle_compilations(
 ) -> Result<IsleCompilations, std::io::Error> {
  let cur_dir = std::env::current_dir()?;
 
- let clif_isle = out_dir.join("clif.isle");
+ // Preludes.
+ let clif_lower_isle = out_dir.join("clif_lower.isle");
+ let clif_opt_isle = out_dir.join("clif_opt.isle");
  let prelude_isle =
  make_isle_source_path_relative(&cur_dir, crate_dir.join("src").join("prelude.isle"));
+ let prelude_opt_isle =
+ make_isle_source_path_relative(&cur_dir, crate_dir.join("src").join("prelude_opt.isle"));
+ let prelude_lower_isle =
+ make_isle_source_path_relative(&cur_dir, crate_dir.join("src").join("prelude_lower.isle"));
+
+ // Directory for mid-end optimizations.
+ let src_opts = make_isle_source_path_relative(&cur_dir, crate_dir.join("src").join("opts"));
+ // Directories for lowering backends.
  let src_isa_x64 =
  make_isle_source_path_relative(&cur_dir, crate_dir.join("src").join("isa").join("x64"));
  let src_isa_aarch64 =
@@ -202,35 +212,49 @@ fn get_isle_compilations(
  // `cranelift/codegen/src/isa/*/lower/isle/generated_code.rs`!
  Ok(IsleCompilations {
  items: vec![
+ // The mid-end optimization rules.
+ IsleCompilation {
+ output: out_dir.join("isle_opt.rs"),
+ inputs: vec![
+ prelude_isle.clone(),
+ prelude_opt_isle.clone(),
+ src_opts.join("algebraic.isle"),
+ src_opts.join("cprop.isle"),
+ ],
+ untracked_inputs: vec![clif_opt_isle.clone()],
+ },
  // The x86-64 instruction selector.
  IsleCompilation {
  output: out_dir.join("isle_x64.rs"),
  inputs: vec![
  prelude_isle.clone(),
+ prelude_lower_isle.clone(),
  src_isa_x64.join("inst.isle"),
  src_isa_x64.join("lower.isle"),
  ],
- untracked_inputs: vec![clif_isle.clone()],
+ untracked_inputs: vec![clif_lower_isle.clone()],
  },
  // The aarch64 instruction selector.
  IsleCompilation {
  output: out_dir.join("isle_aarch64.rs"),
  inputs: vec![
  prelude_isle.clone(),
+ prelude_lower_isle.clone(),
  src_isa_aarch64.join("inst.isle"),
  src_isa_aarch64.join("lower.isle"),
  ],
- untracked_inputs: vec![clif_isle.clone()],
+ untracked_inputs: vec![clif_lower_isle.clone()],
  },
  // The s390x instruction selector.
  IsleCompilation {
  output: out_dir.join("isle_s390x.rs"),
  inputs: vec![
  prelude_isle.clone(),
+ prelude_lower_isle.clone(),
  src_isa_s390x.join("inst.isle"),
  src_isa_s390x.join("lower.isle"),
  ],
- untracked_inputs: vec![clif_isle.clone()],
+ untracked_inputs: vec![clif_lower_isle.clone()],
  },
  ],
  })