x64: Optimize store-of-extract-lane-0 #5924
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
github-actions
bot
added
cranelift
abrown
approved these changes
Mar 9, 2023
There was a problem hiding this comment.
Makes sense to me. I think the discussion about alignment in #2716 may be relevant to this, if you're interested; essentially, what we're doing here for lane 0 can be done for all lanes with PINSR* and PEXTR* for unalignment memory on both the load and store side. I wonder if we should add the AVX versions of MOVSS and MOVSD here for completeness, though?
|
Agreed! I hope to get to that next with the special casing and that way extracing For AVX support this PR sort of conflicts with #5931, so I'll update this once that goes in and the helper will automatically use |
The `movss` and `movsd` instructions can be used to store the 0th lane of a `t32x4` or a `t64x2` vector into memory, enabling fusing a `store` and an `extractlane` instruction.
alexcrichton
force-pushed
the
optimize-store-extractlane
branch
from
adcbc52
to
60ddf86
Compare
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
The
movssandmovsdinstructions can be used to store the 0th lane of at32x4or at64x2vector into memory, enabling fusing astoreand anextractlaneinstruction.