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riscv64: Implement SIMD fcmp #6643

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merged 4 commits into from
Jun 27, 2023

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afonso360
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👋 Hey,

This PR implements SIMD fcmp for RISC-V. This is a lot simpler than icmp since we don't have as many instructions to implement. Furthermore half of the rules are implemented with mask operations and other rules, so we save significant amounts of work by reusing the preexisting rules.

All of these lowerings are based on what LLVM generates.

@afonso360 afonso360 added the cranelift:area:riscv64 Issues related to the RISC-V 64 backend. label Jun 26, 2023
@afonso360 afonso360 requested review from a team as code owners June 26, 2023 21:00
@afonso360 afonso360 requested review from cfallin and removed request for a team June 26, 2023 21:00
@github-actions github-actions bot added the cranelift Issues related to the Cranelift code generator label Jun 26, 2023
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Nice! And thanks for the addition of all the exhaustive tests as always 👍

@alexcrichton alexcrichton added this pull request to the merge queue Jun 27, 2023
Merged via the queue into bytecodealliance:main with commit 3cab644 Jun 27, 2023
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