riscv64: Implement various SIMD float ops #6657
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👋 Hey,
This PR implements a few SIMD float ops. These are:
fabsfcopysignfmin_pseudofmax_pseudofminfmaxf{min,max}are slightly complicated since we don't have a instruction that exactly matches the required semantics. The implementation here builds a mask for the inputs that are NaN and returns the canonical NaN in these cases. This is the same lowering that V8 uses.I've had to alter the
simd-fmax-fmintests since they were expecting the sign bit of the resulting NaN to be unchanged, however this seems not to be required as per our documentation. I've moved these tests to thenondeterministictestsuites that we have.