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PCC: draw the rest of the owl: fully-working PCC on hello-world Wasm on aarch64 #7281

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merged 2 commits into from
Oct 19, 2023

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@cfallin cfallin commented Oct 18, 2023

This needed a bit more inference / magic than I was hoping for at first,
specifically around constants and adds. Some instructions can now
generate facts on their output registers, even if not stated. This
breaks away from the "breadcrumbs" idea, but seems to be the most
practical solution to a general problem that we have mini-lowering steps
in various places without careful preservation of PCC facts. Two
particular aspects:

  • Constants: amodes on aarch64 can decompose into new
    constant-generation instructions, and we need precise ranges on those
    to properly check them. To avoid making the ISLE rules nightmarish,
    it's best to reuse the existing semantics definitions of the Add* ALU
    insts, and add a few rules for MovK/MovZ/MovN.

  • Adds: similarly, amodes decompose into de-novo add instructions with
    no facts. To handle this, there's now a notion of "propagating" facts
    that cause an instruction with a propagating fact on the input to
    generate a fact on the output.

Together, these heuristics mean that we'll eagerly generate a fact for
mem(mt0, 0, 0) + 8 -> mem(mt0, 8, 8), but we won't, for example,
generate ranges on every single integer operation.

With these changes and a few other misc fixes, this PR can now check a
nontrivial "hello world" Wasm on aarch64 down to the machine-code level:

$ target/release/wasmtime compile -C enable-pcc=y ../wasm-tests/helloworld-rs.wasm
# completes successfully

(This builds on #7280, and I also intend to clean it up a bit, so creating as a draft for now)

@cfallin cfallin requested a review from fitzgen October 18, 2023 08:43
@github-actions github-actions bot added cranelift Issues related to the Cranelift code generator cranelift:area:machinst Issues related to instruction selection and the new MachInst backend. cranelift:area:aarch64 Issues related to AArch64 backend. cranelift:wasm labels Oct 18, 2023
cranelift/codegen/Cargo.toml Outdated Show resolved Hide resolved
cranelift/codegen/src/ir/pcc.rs Outdated Show resolved Hide resolved
cranelift/codegen/src/ir/pcc.rs Outdated Show resolved Hide resolved
cranelift/codegen/src/ir/pcc.rs Outdated Show resolved Hide resolved
cranelift/codegen/src/isa/aarch64/pcc.rs Outdated Show resolved Hide resolved
cranelift/codegen/src/isa/aarch64/pcc.rs Outdated Show resolved Hide resolved
cranelift/codegen/src/isa/aarch64/pcc.rs Outdated Show resolved Hide resolved
cranelift/codegen/src/isa/aarch64/pcc.rs Outdated Show resolved Hide resolved
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…on aarch64

This needed a bit more inference / magic than I was hoping for at first,
specifically around constants and adds. Some instructions can now
generate facts on their output registers, even if not stated. This
breaks away from the "breadcrumbs" idea, but seems to be the most
practical solution to a general problem that we have mini-lowering steps
in various places without careful preservation of PCC facts. Two
particular aspects:

- Constants: amodes on aarch64 can decompose into new
  constant-generation instructions, and we need precise ranges on those
  to properly check them. To avoid making the ISLE rules nightmarish,
  it's best to reuse the existing semantics definitions of the Add* ALU
  insts, and add a few rules for MovK/MovZ/MovN.

- Adds: similarly, amodes decompose into de-novo add instructions with
  no facts. To handle this, there's now a notion of "propagating" facts
  that cause an instruction with a propagating fact on the input to
  generate a fact on the output.

Together, these heuristics mean that we'll eagerly generate a fact for
`mem(mt0, 0, 0) + 8 -> mem(mt0, 8, 8)`, but we won't, for example,
generate ranges on every single integer operation.

With these changes and a few other misc fixes, this PR can now check a
nontrivial "hello world" Wasm on aarch64 down to the machine-code level:

```
$ target/release/wasmtime compile -C enable-pcc=y ../wasm-tests/helloworld-rs.wasm
```
@cfallin cfallin marked this pull request as ready for review October 19, 2023 19:08
@cfallin cfallin requested a review from a team as a code owner October 19, 2023 19:08
@cfallin cfallin disabled auto-merge October 19, 2023 19:08
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cfallin commented Oct 19, 2023

@fitzgen -- updated in live review, ready for an r+ now I think!

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Thanks!

@fitzgen fitzgen added this pull request to the merge queue Oct 19, 2023
Merged via the queue into bytecodealliance:main with commit 8d19280 Oct 19, 2023
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