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riscv64: Add support for bitcast.i128 with a i128 argument #8851

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Jun 20, 2024
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riscv64: Add support for bitcast.i128 with a i128 argument #8851

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9 changes: 7 additions & 2 deletions cranelift/codegen/src/isa/riscv64/lower.isle
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Original file line number Diff line number Diff line change
Expand Up @@ -2465,20 +2465,25 @@

;; These rules should probably be handled in `gen_bitcast`, but it's convenient to have that return
;; a single register, instead of a `ValueRegs`
(rule 2 (lower (has_type $I128 (bitcast _ v @ (value_type (ty_vec_fits_in_register _)))))
(rule 3 (lower (has_type $I128 (bitcast _ v @ (value_type (ty_vec_fits_in_register _)))))
(value_regs
(gen_extractlane $I64X2 v 0)
(gen_extractlane $I64X2 v 1)))

;; Move the high half into a vector register, and then use vslide1up to move it up and
;; insert the lower half in one instruction.
(rule 1 (lower (has_type (ty_vec_fits_in_register _) (bitcast _ v @ (value_type $I128))))
(rule 2 (lower (has_type (ty_vec_fits_in_register _) (bitcast _ v @ (value_type $I128))))
(let ((lo XReg (value_regs_get v 0))
(hi XReg (value_regs_get v 1))
(vstate VState (vstate_from_type $I64X2))
(vec VReg (rv_vmv_sx hi vstate)))
(rv_vslide1up_vx vec vec lo (unmasked) vstate)))

;; `gen_bitcast` below only works with single register values, so handle I128
;; specially here.
(rule 1 (lower (has_type $I128 (bitcast _ v @ (value_type $I128))))
v)

(rule 0 (lower (has_type out_ty (bitcast _ v @ (value_type in_ty))))
(gen_bitcast v in_ty out_ty))

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15 changes: 15 additions & 0 deletions cranelift/filetests/filetests/runtests/i128-bitcast.clif
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Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
test interpret
test run
set enable_llvm_abi_extensions=true
target aarch64
target x86_64
target s390x
target riscv64
target riscv64 has_c has_zcb

function %bitcast_i128_i128(i128) -> i128 {
block0(v0: i128):
v1 = bitcast.i128 v0
return v1
}
; run: %bitcast_i128_i128(0) == 0
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