dump ports should inline clk and reset after lowering #1056
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Another weird problem with the cell interface inlining problem in #1034. In this case, the externalize pass used by the synthesis pipeline needs the
@clkand@resetports to be inlined in the main component interface because otherwise they are not usable.This is different from
refcells because they occur in non-maincomponents and can implicitly use the clk of the context.