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Several small fixups (#2489)
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* Remove internal code from API

* Fix compatibility headers and test the generation of them

* Cancel all previous test workflows on new push.

* Add valgrind test
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Rot127 authored Sep 30, 2024
1 parent a34901e commit 29d8773
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Showing 12 changed files with 48 additions and 38 deletions.
21 changes: 21 additions & 0 deletions .github/workflows/CITest.yml
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,11 @@ on:
- "TODO"
pull_request:

# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

env:
CI: true

Expand Down Expand Up @@ -130,6 +135,22 @@ jobs:
run: |
ctest --test-dir build --output-on-failure -R legacy*
- name: Valgrind cstest
if: startsWith(matrix.config.build-system, 'cmake') && startsWith(matrix.config.enable-asan, 'OFF')
run: |
sudo apt-get install valgrind
valgrind cstest tests
- name: Comaptibility header generation
if: startsWith(matrix.config.build-system, 'cmake')
run: |
cp ./include/capstone/arm64.h arm64_compat_current.h
cp ./include/capstone/systemz_compatibility.h systemz_compat_current.h
./suite/auto-sync/src/autosync/HeaderPatcher.py -c --v6 ./include/capstone/aarch64.h --v5 ./include/capstone/arm64.h
./suite/auto-sync/src/autosync/HeaderPatcher.py -c --v6 ./include/capstone/systemz.h --v5 ./include/capstone/systemz_compatibility.h
diff ./include/capstone/arm64.h arm64_compat_current.h &&
diff ./include/capstone/systemz_compatibility.h systemz_compat_current.h
Windows:
runs-on: ${{ matrix.config.os }}
name: ${{ matrix.config.name }}
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5 changes: 5 additions & 0 deletions .github/workflows/clang-tidy.yml
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Expand Up @@ -6,6 +6,11 @@ on:
- '**.h'
pull_request:

# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

jobs:
analyze:
runs-on: ubuntu-24.04
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5 changes: 5 additions & 0 deletions .github/workflows/python-tests.yml
Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,11 @@ on:
push:
pull_request:

# Stop previous runs on the same branch on new push
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: true

jobs:
build:
runs-on: ${{ matrix.os }}
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10 changes: 10 additions & 0 deletions arch/AArch64/AArch64Mapping.h
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Expand Up @@ -12,6 +12,16 @@ typedef enum {
#include "AArch64GenCSOpGroup.inc"
} aarch64_op_group;

/// Components of an SME matrix.
/// Used when an sme operand is set to signal which part should be set.
typedef enum {
AARCH64_SME_MATRIX_TILE,
AARCH64_SME_MATRIX_TILE_LIST,
AARCH64_SME_MATRIX_SLICE_REG,
AARCH64_SME_MATRIX_SLICE_OFF,
AARCH64_SME_MATRIX_SLICE_OFF_RANGE,
} aarch64_sme_op_part;

// return name of register in friendly string
const char *AArch64_reg_name(csh handle, unsigned int reg);

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6 changes: 0 additions & 6 deletions bindings/python/capstone/aarch64_const.py
Original file line number Diff line number Diff line change
Expand Up @@ -2359,12 +2359,6 @@
AARCH64_REG_X29 = AARCH64_REG_FP
AARCH64_REG_X30 = AARCH64_REG_LR

AARCH64_SME_MATRIX_TILE = 0
AARCH64_SME_MATRIX_TILE_LIST = 1
AARCH64_SME_MATRIX_SLICE_REG = 2
AARCH64_SME_MATRIX_SLICE_OFF = 3
AARCH64_SME_MATRIX_SLICE_OFF_RANGE = 4

AARCH64_SME_OP_INVALID = 0
AARCH64_SME_OP_TILE = 1
AARCH64_SME_OP_TILE_VEC = 2
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1 change: 0 additions & 1 deletion bindings/python/capstone/ppc_const.py
Original file line number Diff line number Diff line change
Expand Up @@ -3095,4 +3095,3 @@
PPC_INSN_FORM_XL_BI_MASK = 0x001f0000
PPC_INSN_FORM_XL_BH_MASK = 0x00001800
PPC_INSN_FORM_XL_XO_MASK = 0x000007fe
NUM_PPC_OPS = 8
10 changes: 0 additions & 10 deletions include/capstone/aarch64.h
Original file line number Diff line number Diff line change
Expand Up @@ -2772,16 +2772,6 @@ typedef struct aarch64_op_mem {
int32_t disp; ///< displacement/offset value
} aarch64_op_mem;

/// Components of an SME matrix.
/// Used when an sme operand is set to signal which part should be set.
typedef enum {
AARCH64_SME_MATRIX_TILE,
AARCH64_SME_MATRIX_TILE_LIST,
AARCH64_SME_MATRIX_SLICE_REG,
AARCH64_SME_MATRIX_SLICE_OFF,
AARCH64_SME_MATRIX_SLICE_OFF_RANGE,
} aarch64_sme_op_part;

typedef enum {
AARCH64_SME_OP_INVALID,
AARCH64_SME_OP_TILE, ///< SME operand is a single tile.
Expand Down
13 changes: 4 additions & 9 deletions include/capstone/arm64.h
Original file line number Diff line number Diff line change
Expand Up @@ -2626,20 +2626,15 @@ typedef enum {

typedef aarch64_op_mem arm64_op_mem;

typedef enum {
ARM64_SME_MATRIX_TILE = AARCH64_SME_MATRIX_TILE,
ARM64_SME_MATRIX_TILE_LIST = AARCH64_SME_MATRIX_TILE_LIST,
ARM64_SME_MATRIX_SLICE_REG = AARCH64_SME_MATRIX_SLICE_REG,
ARM64_SME_MATRIX_SLICE_OFF = AARCH64_SME_MATRIX_SLICE_OFF,
ARM64_SME_MATRIX_SLICE_OFF_RANGE = AARCH64_SME_MATRIX_SLICE_OFF_RANGE,
} arm64_sme_op_part;

typedef enum {
ARM64_SME_OP_INVALID = AARCH64_SME_OP_INVALID,
ARM64_SME_OP_TILE = AARCH64_SME_OP_TILE,
ARM64_SME_OP_TILE_VEC = AARCH64_SME_OP_TILE_VEC,
} arm64_sme_op_type;

#define ARM64_SLICE_IMM_INVALID UINT16_MAX
#define ARM64_SLICE_IMM_RANGE_INVALID UINT8_MAX

typedef aarch64_imm_range arm64_imm_range;

typedef aarch64_op_sme arm64_op_sme;
Expand All @@ -2650,7 +2645,7 @@ typedef cs_aarch64_op cs_arm64_op;

typedef aarch64_suppl_info arm64_suppl_info;

#define MAX_ARM64_OPS 8
#define NUM_ARM64_OPS 16

typedef cs_aarch64 cs_arm64;

Expand Down
2 changes: 1 addition & 1 deletion include/capstone/systemz_compatibility.h
Original file line number Diff line number Diff line change
Expand Up @@ -340,7 +340,7 @@ typedef systemz_op_mem sysz_op_mem;

typedef cs_systemz_op cs_sysz_op;

#define MAX_SYSZ_OPS 6
#define NUM_SYSZ_OPS 6

typedef cs_systemz cs_sysz;

Expand Down
2 changes: 1 addition & 1 deletion suite/auto-sync/src/autosync/HeaderPatcher.py
Original file line number Diff line number Diff line change
Expand Up @@ -174,7 +174,7 @@ def replace_typedef_enum(self, v6_lines: list[str]) -> list[str]:
rf"({self.v6_camel}|{self.v6_upper})([\w_]+)", line
)
entry_name: str = "".join(found[0])
v5_name = entry_name.replace(self.v6_camel, self.v6_camel).replace(
v5_name = entry_name.replace(self.v6_camel, self.v5_upper).replace(
self.v6_upper, self.v5_upper
)
patched_line = re.sub(
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9 changes: 0 additions & 9 deletions suite/cstest/include/test_mapping.h
Original file line number Diff line number Diff line change
Expand Up @@ -278,15 +278,6 @@ static const cs_enum_id_map cs_enum_map[] = {
{ .str = "AARCH64_SFT_LSR", .val = AARCH64_SFT_LSR },
{ .str = "AARCH64_SFT_MSL", .val = AARCH64_SFT_MSL },
{ .str = "AARCH64_SFT_ROR", .val = AARCH64_SFT_ROR },
{ .str = "AARCH64_SME_MATRIX_SLICE_OFF",
.val = AARCH64_SME_MATRIX_SLICE_OFF },
{ .str = "AARCH64_SME_MATRIX_SLICE_OFF_RANGE",
.val = AARCH64_SME_MATRIX_SLICE_OFF_RANGE },
{ .str = "AARCH64_SME_MATRIX_SLICE_REG",
.val = AARCH64_SME_MATRIX_SLICE_REG },
{ .str = "AARCH64_SME_MATRIX_TILE", .val = AARCH64_SME_MATRIX_TILE },
{ .str = "AARCH64_SME_MATRIX_TILE_LIST",
.val = AARCH64_SME_MATRIX_TILE_LIST },
{ .str = "AARCH64_SME_OP_INVALID", .val = AARCH64_SME_OP_INVALID },
{ .str = "AARCH64_SME_OP_TILE", .val = AARCH64_SME_OP_TILE },
{ .str = "AARCH64_SME_OP_TILE_VEC", .val = AARCH64_SME_OP_TILE_VEC },
Expand Down
2 changes: 1 addition & 1 deletion tests/issues/issues.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -251,7 +251,7 @@ test_cases:
-
type: AARCH64_OP_SME
sme:
type: AARCH64_SME_MATRIX_SLICE_REG
type: AARCH64_SME_OP_TILE_VEC
tile: za0.s
slice_reg: w12
slice_offset_imm: 2
Expand Down

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