x64 new backend: port ABI implementation to shared infrastructure wit…

…h AArch64. Previously, in bytecodealliance#2128, we factored out a common "vanilla 64-bit ABI" implementation from the AArch64 ABI code, with the idea that this should be largely compatible with x64. This PR alters the new x64 backend to make use of the shared infrastructure, removing the duplication that existed previously. The generated code is nearly (not exactly) the same; the only difference relates to how the clobber-save region is padded in the prologue.
cfallin · Aug 18, 2020 · a1f6d22 · a1f6d22
1 parent 7fdbd08
commit a1f6d22
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Showing 3 changed files with 576 additions and 1,129 deletions.
diff --git a/cranelift/codegen/src/isa/aarch64/abi.rs b/cranelift/codegen/src/isa/aarch64/abi.rs
@@ -544,6 +544,7 @@ impl ABIMachineImpl for AArch64MachineImpl {
         defs: Vec<Writable<Reg>>,
         loc: SourceLoc,
         opcode: ir::Opcode,
+        tmp: Writable<Reg>,
     ) -> SmallVec<[(/* is_safepoint = */ bool, Inst); 2]> {
         let mut insts = SmallVec::new();
         match &dest {
@@ -563,7 +564,7 @@ impl ABIMachineImpl for AArch64MachineImpl {
                 insts.push((
                     false,
                     Inst::LoadExtName {
-                        rd: writable_spilltmp_reg(),
+                        rd: tmp,
                         name: Box::new(name.clone()),
                         offset: 0,
                         srcloc: loc,
@@ -573,7 +574,7 @@ impl ABIMachineImpl for AArch64MachineImpl {
                     true,
                     Inst::CallInd {
                         info: Box::new(CallIndInfo {
-                            rn: spilltmp_reg(),
+                            rn: tmp.to_reg(),
                             uses,
                             defs,
                             loc,