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[SystemVerilog] Abstract, dynamic database and abstract database item class based on factory pattern with a concrete implementation for electrical specifications. There is also a utility class declaration with static functions for string manipulation.

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Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
README.md		README.md
database.sv		database.sv
database_pkg.sv		database_pkg.sv
factory.sv		factory.sv
file_string_tasks.sv		file_string_tasks.sv
macros.svh		macros.svh
spec_pkg.sv		spec_pkg.sv
specs.csv		specs.csv
unit_test.sv		unit_test.sv