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i#1569, i#3544 Port sample 'cbr' to AARCH64 and RISCV64. #4

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i#1569, i#3544 Port sample 'cbr' to AARCH64 and RISCV64. #4

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chenhy0106
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  1. For RISCV64, conditional branch instruction of 'C' extension may not reach after adding clean call. So like X86, we add support to detect and convert compressed cbr to longer version.
  2. For AARCH64 and RISCV64, a cbr may use the stolen reg and can not be mangled later as it is meta. So we check whether a cbr uses the stolen reg and replace it with a scratch reg.

Now cbr works for AARCH64 and RISCV64. Still not work for ARM32 because of some bugs unrelated to cbr sample.

Issue: DynamoRIO#1569, DynamoRIO#3544

@chenhy0106 chenhy0106 closed this Jun 3, 2024
chenhy0106 pushed a commit that referenced this pull request Jul 17, 2024
@derekbruening
i#6884: Add drmemtrace signal number marker (DynamoRIO#6885)
1211505 
Adds a new drmemtrace marker holding the signal number which is emitted
after the kernel event marker. It is not emitted at the signal return
point; only at the transfer to the handler.

Does not add a feature bit or increase the version as this marker is
considered optional and so no mechanism is provided for users to be
guaranteed that it is present.

Adds view tool support.

Adds a test that the marker is emitted in the burst_gencode test. Output
from the test's trace:
```
          52          32:     1616564 ifetch       2 byte(s) @ 0x00007f615935d023 0f 0b                ud2
          53          32:     1616564 <marker: kernel xfer from 0x7f615935d023 to handler>
          54          32:     1616564 <marker: signal #4>
          55          32:     1616564 <marker: timestamp 13365562571171519>
          56          32:     1616564 <marker: tid 1616564 on core 9>
          57          33:     1616564 ifetch       1 byte(s) @ 0x00005641b091170b 55                   push   %rbp
```

Fixes DynamoRIO#6884
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