Adds SR flip-flop #210
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Adds SR flip-flop #210
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Flip-flop with set and reset input signals. Clock input signal is optional. It can be triggered by raising or failing edge. Master reset (which pulls output low regardless of the state of S and R) is also optional and can be inverted. Such SR flip-flop with inverted master reset is used internally in 555 chip.
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This pull request is adding xml file for SR Flip-Flop. It is very configurable. Clock with falling or rising edge can be added. Also master reset is optional. It was tested using command line utility.