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Add Clash.Annotations.SynthesisAttributes.markDebug (plus an unfortunate amount of baggage) #2547

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merged 9 commits into from
Jul 19, 2023

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martijnbastiaan
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I was playing around with constraint files and thought it would be nice if we could have a term level way of annotating signals with synthesis attributes. That is, the markDebug proposed in this PR. Unfortunately, I ran into quite a number of things I needed (and "needed") to fix before being able to add the function:

  • Fixed a layout issue with block rendering in VHDL
  • Discovered tests in shouldwork/ that weren't part of clash-testsuite
  • Fixed an issue where VHDL would render a bool attribute, while only boolean is recognized
  • Add TermLiteral (Vec n a)
  • Refactored and simplified coreToAttrs / coreToAttr. The old implementation tried to be helpful with its error messages, but I didn't feel they helped out very much. Reading the code wasn't as nice as it could be either so...
  • Generalized Attr to work over Symbol (type level) and String (term level)
    • Preparation work for annotate
  • Removed Attr' now that Attr is generalized
  • Add annotate: a way of adding synthesis attributes to signals
  • Add markDebug: a convenience function that emits all keep/debug pragmas needed for synthesis tooling (currently verified for Vivado and Quartus)

Each of these points correspond to a commit. This PR can be split up into multiple smaller ones if desired.

Still TODO:

  • Write a changelog entry (see changelog/README.md)
  • Check copyright notices are up to date in edited files

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One of the commit messages uses the term "erasion". Although it seems to be an actual word, both my Firefox dictionary and the other people in the office prefer the term "erasure".

clash-lib/src/Clash/Core/Type.hs Outdated Show resolved Hide resolved
martijnbastiaan and others added 6 commits July 19, 2023 22:11
Before:

    block
      ...
      attribute str_attr of my_signal : signal is "foo";begin
      ...
    end block;

After:

    block
      ...
      attribute str_attr of my_signal : signal is "foo";
    begin
      ...
    end block;
The former is not a VHDL attribute type
 * Use TemplateHaskellQuotes where possible
 * Use more sensible argument names + add comment
 * Use string interpolation
Allows `clash-prelude` and `clash-lib` to share the type, as well as
allow `Attr` to be used in combination with `TermLiteral`.
@martijnbastiaan martijnbastiaan force-pushed the add-mark-debug branch 2 times, most recently from eab26a5 to 793f6a6 Compare July 19, 2023 20:14
Add a term-level way of adding annotations to signals. This is more
reliable than type level annotations, as it is guaranteed to survive
optimizations and type alias erasure.
Add a term level way of marking a signal as "debug". This instructs
synthesizers to leave a signal alone, even after optimizations.
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2 participants