Preparation for ARM64 Implementation of poly operations for dilithium package. #562
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a part of bigger PR: #561 |
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once this PR is approved, I will provide the the other PR's due to the fact that the other PR's need the base files (arm64.s and arm64.go) |
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what should be considered is the alignment of the poly array. The difference between unaligned and aligned loads and stores needs to be tested. |
bwesterb
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Aug 14, 2025
| // manually unrolling could also be done, for now skipped | ||
| MOVW $16, R3 | ||
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| add: |
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nit: you can just call this loop
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okey, I will take it under consideration on the next PR's!
| VLD1.P (64)(R1), [V0.S4, V1.S4, V2.S4, V3.S4] | ||
| VLD1.P (64)(R2), [V4.S4, V5.S4, V6.S4, V7.S4] | ||
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| VADD V4.S4, V0.S4, V8.S4 |
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Note: it's not necessary here, but you can reuse V0 or V4 as target register.
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you are absolutely right!
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This is ready to be merged @armfazh |
armfazh
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Aug 14, 2025
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Thank you @elementrics, keep 'm coming! |
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To test performance difference on arm64 chips: "go test -benchmem -run=^$ ./sign/internal/dilithium -bench=Add"
On my machine (Apple M1 Max) on average:
Also consider this are microbenchmarks!