Skip to content

Commit

Permalink
meson: remove some unnecessary patches (#11584)
Browse files Browse the repository at this point in the history
  • Loading branch information
@shiyu1314
shiyu1314 authored Oct 11, 2023
1 parent 4065f3b commit 55f3d9f
Show file tree
Hide file tree
Showing 2 changed files with 162 additions and 177 deletions.
321 changes: 162 additions & 159 deletions target/linux/meson/files/arch/arm/boot/dts/meson8b-onecloud.dts
View file
Original file line number Diff line number Diff line change
Expand Up @@ -132,25 +132,22 @@

regulator-name = "VCC_CORE";

// ------------------------------------------
// | The actual mapping in phyical |
// --------------------------------------
// | | 100% | 60% | 30% | 0% |
// --------------------------------------
// | V1.0 | 677mV | 857mV | 992mV | 1127mV |
// | V1.3 | 1116mV | 1121mV | 1125mV | 1129mV |
// --------------------------------------
// ---------------------------------------------------
// | The actual mapping in phyical |
// ----------------------------------------------
// | | 100% | 60% | 30% | 10% | 0% |
// ----------------------------------------------
// | V1.0 | 677mV | 857mV | 992mV | 1082mV | 1127mV |
// | V1.3 | 1116mV | 1121mV | 1125mV | 1128mV | 1129mV |
// ----------------------------------------------
//
// According to meson8b.dtsi, the CPU should be able
// to run at 504MHz with 870mV. But according to my
// test on V1.0, the system will crash in this case.
//
// And this regulator supplies not only CPU but also GPU.
//
// So we use higher voltages.
// According to meson8b.dtsi, the CPU should be able to
// run at 504MHz with 870mV. But this regulator supplies
// not only CPU but also GPU. And according to the users'
// tests on V1.0, we need such higher voltages.

pwms = <&pwm_cd 1 12001 0>; // PWM_D
pwm-dutycycle-range = <30 0>;
pwm-dutycycle-range = <10 0>;
regulator-min-microvolt = <860000>;
regulator-max-microvolt = <1140000>;

Expand All @@ -161,6 +158,12 @@
};
};

&uart_AO {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
};

&pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
Expand All @@ -173,145 +176,123 @@
cpu-supply = <&vcc_core>;
};

&saradc {
status = "okay";
vref-supply = <&vcc_1v8>;
};

&gpio {
gpio-line-names =
// 0-3 Bank GPIOX 0-3
"7U1_PIN_18", "7U1_PIN_19",
"7U1_PIN_14", "7U1_PIN_15",
// 4-7 Bank GPIOX 4-7
"7U1_PIN_27", "7U1_PIN_25",
"7U1_PIN_28", "7U1_PIN_26",
// 8 Bank GPIOX 8
"R_RightOf_LED",
// 9 Bank GPIOX 9
"7U1_PIN_16",
// 10 Bank GPIOX 10
"",
// 11 Bank GPIOX 11
"7U1_PIN_12",
// 12-16 Bank GPIOX 16-20
"7U1_PIN_43", "7U1_PIN_42",
"7U1_PIN_41(Resistor)", "7U1_PIN_44",
"7U1_PIN_34",
// 17 Bank GPIOX 21
"7U1_PIN_13",

// 18 Bank GPIOY 0
"Resistor_TopOf_LED",
// 19-20 Bank GPIOY 1-3
"", "",
// 21-26 Bank GPIOY 6-11
"", "",
"", "",
"", "",
// 27 Bank GPIOY 12
"",
// 28-29 Bank GPIOY 13-14
"Left_BottomOf_CPU", "Right_BottomOf_CPU",

// 30 Bank GPIODV 9
"VCCK_PWM (PWM_C)",
// 31-35 Bank GPIODV 24-28
"I2CA_SDA", "I2CA_SCL",
"I2CB_SDA", "I2CB_SCL",
"VDDEE_PWM (PWM_D)",
// 36 Bank GPIODV 29
"",

// 37-39 Bank GPIOH 0-2
"HDMI_HPD", "HDMI_I2C_SDA", "HDMI_I2C_SCL",
// 40-46 Bank GPIOH 3-9
"ETH_PHY_INTR", "ETH_PHY_NRST",
"ETH_TXD1", "ETH_TXD0",
"ETH_TXD3", "ETH_TXD2",
"ETH_RGMII_TX_CLK",

// 47-53 Bank CARD 0-6
"SD_D1", "SD_D0",
"SD_CLK", "SD_CMD",
"SD_D3", "SD_D2",
"SD_CD",

// 54-65 Bank BOOT 0-11
"EMMC_D0", "EMMC_D1",
"EMMC_D2", "EMMC_D3",
"EMMC_D4", "EMMC_D5",
"EMMC_D6", "EMMC_D7",
"EMMC_CLK", "EMMC_RSTn",
"EMMC_CMD", "BOOT_SEL",
// 66-72 Bank BOOT 12-18
"", "",
"", "",
"", "",
"",

// 73-74 Bank DIF 0P 0N
"ETH_RXD1", "ETH_RXD0",
// 75-76 Bank DIF 1P 1N
"ETH_RX_DV", "RGMII_RX_CLK",
// 77-78 Bank DIF 2P 2N
"ETH_RXD3", "ETH_RXD2",
// 79-80 Bank DIF 3P 3N
"ETH_TXEN", "ETH_PHY_REF_CLK_25MOUT",
// 81-82 Bank DIF 4P 4N
"ETH_MDC", "ETH_MDIO";
/* 0 */ "WIFI_SDIO_D0 PIN18 (GPIOX_0)",
/* 1 */ "WIFI_SDIO_D1 PIN19 (GPIOX_1)",
/* 2 */ "WIFI_SDIO_D2 PIN14 (GPIOX_2)",
/* 3 */ "WIFI_SDIO_D3 PIN15 (GPIOX_3)",
/* 4 */ "WIFI_PCM_DIN PIN27 (GPIOX_4)",
/* 5 */ "WIFI_PCM_DOUT PIN25 (GPIOX_5)",
/* 6 */ "WIFI_PCM_SYNC PIN28 (GPIOX_6)",
/* 7 */ "WIFI_PCM_CLK PIN26 (GPIOX_7)",
/* 8 */ "WIFI_SDIO_CLK PIN17_Resistor (GPIOX_8)",
/* 9 */ "WIFI_SDIO_CMD PIN16 (GPIOX_9)",
/* 10 */ "GPIOX_10",
/* 11 */ "WIFI PIN12 (GPIOX_11)",
/* 12 */ "WIFI_UART_RX PIN43 (GPIOX_16)",
/* 13 */ "WIFI_UART_TX PIN42 (GPIOX_17)",
/* 14 */ "WIFI_UART_RTS PIN41_Resistor (GPIOX_18)",
/* 15 */ "WIFI_UART_CTS PIN44 (GPIOX_19)",
/* 16 */ "WIFI PIN34 (GPIOX_20)",
/* 17 */ "WIFI_WAKE PIN13 (GPIOX_21)",

/* 18 */ "Resistor_TopOf_LED (GPIOY_0)",
/* 19 */ "GPIOY_1",
/* 20 */ "GPIOY_3",
/* 21 */ "GPIOY_6",
/* 22 */ "GPIOY_7",
/* 23 */ "GPIOY_8",
/* 24 */ "GPIOY_9",
/* 25 */ "GPIOY_10",
/* 26 */ "GPIOY_11",
/* 27 */ "GPIOY_12",
/* 28 */ "Left_BottomOf_CPU (GPIOY_13)",
/* 29 */ "Right_BottomOf_CPU (GPIOY_14)",

/* 30 */ "GPIODV_9 (PWM_C)",
/* 31 */ "GPIODV_24",
/* 32 */ "GPIODV_25",
/* 33 */ "GPIODV_26",
/* 34 */ "GPIODV_27",
/* 35 */ "VCC_CPU_PWM (GPIODV_28)",
/* 36 */ "GPIODV_29",

/* 37 */ "HDMI_HPD (GPIOH_0)",
/* 38 */ "HDMI_SDA (GPIOH_1)",
/* 39 */ "HDMI_SCL (GPIOH_2)",
/* 40 */ "ETH_PHY_INTR (GPIOH_3)",
/* 41 */ "ETH_PHY_nRST (GPIOH_4)",
/* 42 */ "ETH_TXD1 (GPIOH_5)",
/* 43 */ "ETH_TXD0 (GPIOH_6)",
/* 44 */ "ETH_TXD3 (GPIOH_7)",
/* 45 */ "ETH_TXD2 (GPIOH_8)",
/* 46 */ "ETH_TX_CLK (GPIOH_9)",

/* 47 */ "SDCARD_D1 (CARD_0)",
/* 48 */ "SDCARD_D0 (CARD_1)",
/* 49 */ "SDCARD_CLK (CARD_2)",
/* 50 */ "SDCARD_CMD (CARD_3)",
/* 51 */ "SDCARD_D3 (CARD_4)",
/* 52 */ "SDCARD_D2 (CARD_5)",
/* 53 */ "SDCARD_CD (CARD_6)",

/* 54 */ "EMMC_D0 (BOOT_0)",
/* 55 */ "EMMC_D1 (BOOT_1)",
/* 56 */ "EMMC_D2 (BOOT_2)",
/* 57 */ "EMMC_D3 (BOOT_3)",
/* 58 */ "EMMC_D4 (BOOT_4)",
/* 59 */ "EMMC_D5 (BOOT_5)",
/* 60 */ "EMMC_D6 (BOOT_6)",
/* 61 */ "EMMC_D7 (BOOT_7)",
/* 62 */ "EMMC_CLK (BOOT_8)",
/* 63 */ "EMMC_nRST (BOOT_9)",
/* 64 */ "EMMC_CMD (BOOT_10)",
/* 65 */ "BOOT_11",
/* 66 */ "BOOT_12",
/* 67 */ "BOOT_13",
/* 68 */ "BOOT_14",
/* 69 */ "BOOT_15",
/* 70 */ "BOOT_16",
/* 71 */ "BOOT_17",
/* 72 */ "BOOT_18",

/* 73 */ "ETH_RXD1 (DIF_0_P)",
/* 74 */ "ETH_RXD0 (DIF_0_N)",
/* 75 */ "ETH_RX_DV (DIF_1_P)",
/* 76 */ "ETH_RX_CLK (DIF_1_N)",
/* 77 */ "ETH_RXD3 (DIF_2_P)",
/* 78 */ "ETH_RXD2 (DIF_2_N)",
/* 79 */ "ETH_TX_EN (DIF_3_P)",
/* 80 */ "ETH_REF_CLK (DIF_3_N)",
/* 81 */ "ETH_MDC (DIF_4_P)",
/* 82 */ "ETH_MDIO_EN (DIF_4_N)";
};

&gpio_ao {
gpio-line-names =
// 0-1 Band GPIOAO 0-1
"UART TX", "UART RX",
// 2-4 Band GPIOAO 2-4
"RED_LED", "GREEN_LED", "BLUE_LED",
// 5 Band GPIOAO 5
"BUTTON",
// 6 Band GPIOAO 6
"",
// 7 Band GPIOAO 7
"IR_IN",
// 8 Band GPIOAO 8-13
"", "",
"", "",
"", "",

// 14 Band GPIO_BSD_EN
"",
// 15 GPIO_TEST_N
"";
};

&ethmac {
status = "okay";

pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";

phy-handle = <&eth_phy>;
phy-mode = "rgmii-rxid";

mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;

// Realtek RTL8211F (0x001cc916)
eth_phy: ethernet-phy@0 {
reg = <0>;

reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;

interrupt-parent = <&gpio_intc>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>; // GPIOH 3
};
};
};

&saradc {
status = "okay";
vref-supply = <&vcc_1v8>;
/* 0 */ "UART TX (GPIOAO_0)",
/* 1 */ "UART RX (GPIOAO_1)",
/* 2 */ "RED_LED (GPIOAO_2)",
/* 3 */ "GREEN_LED (GPIOAO_3)",
/* 4 */ "BLUE_LED (GPIOAO_4)",
/* 5 */ "BUTTON (GPIOAO_5)",
/* 6 */ "GPIOAO_6",
/* 7 */ "IR_IN (GPIOAO_7)",
/* 8 */ "GPIOAO_8",
/* 9 */ "GPIOAO_9",
/* 10 */ "GPIOAO_10",
/* 11 */ "GPIOAO_11",
/* 12 */ "GPIOAO_12",
/* 13 */ "GPIOAO_13",

/* 14 */ "GPIO_BSD_EN",
/* 15 */ "GPIO_TEST_N";
};

// eMMC
Expand All @@ -321,16 +302,13 @@
pinctrl-0 = <&sdxc_c_pins>;
pinctrl-names = "default";

non-removable;
bus-width = <8>;
max-frequency = <100000000>;

disable-wp;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
no-sdio;

mmc-pwrseq = <&emmc_pwrseq>;

vmmc-supply = <&vcc_3v3>;
// vqmmc-supply = <&vcc_3v3>;
};
Expand Down Expand Up @@ -360,28 +338,53 @@
};
};

&uart_AO {
&ethmac {
status = "okay";
pinctrl-0 = <&uart_ao_a_pins>;

pinctrl-0 = <&eth_rgmii_pins>;
pinctrl-names = "default";
};

&usb0_phy {
status = "okay";
phy-handle = <&eth_phy>;
phy-mode = "rgmii-rxid";

mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;

// Realtek RTL8211F (0x001cc916)
eth_phy: ethernet-phy@0 {
reg = <0>;

reset-assert-us = <10000>;
reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;

interrupt-parent = <&gpio_intc>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>; // GPIOH 3
};
};
};

&usb0 {
status = "okay";
dr_mode = "otg";
usb-role-switch;
role-switch-default-mode = "host";
};

&usb1_phy {
&usb0_phy {
status = "okay";
};

&usb1 {
status = "okay";
};

&usb1_phy {
status = "okay";
};

&ir_receiver {
status = "okay";
pinctrl-0 = <&ir_recv_pins>;
Expand Down
Loading

0 comments on commit 55f3d9f

Please sign in to comment.