Allow empty functions to be elaborated during translation

[kkiningh]

Previously, the following code would error during translation:

class Alu(Model):
        def elaborate_logic(self):
            @self.combinational
            def comb(): 
                pass

This pull request fixes that.

[cbatten]

Interesting! Can you maybe explain where this programming pattern is common?

[kkiningh]

I removed the body of a combinational block to debug something. I don't know if that's common, but it doesn't seem like something the compiler should give a cryptic "Unexpected error during VerilogTranslation!" on.