Skip to content

Commit

Permalink
Merge branch 'master' of github.com:ckolivas/cgminer
Browse files Browse the repository at this point in the history
  • Loading branch information
@ckolivas
ckolivas committed Jan 23, 2017
2 parents 016ca81 + ae7e42e commit 1afb29f
Show file tree
Hide file tree
Showing 6 changed files with 138 additions and 173 deletions.
4 changes: 4 additions & 0 deletions ASIC-README
View file
Original file line number Diff line number Diff line change
Expand Up @@ -290,6 +290,8 @@ ASIC SPECIFIC COMMANDS
--avalon4-least-pll <arg> Set least pll check threshold for smart speed mode 2 (default: 768)
--avalon4-most-pll <arg> Set most pll check threshold for smart speed mode 2 (default: 256)
--avalon7-voltage Set Avalon7 default core voltage, in millivolts, step: 78
--avalon7-voltage-level Set Avalon7 default level of core voltage, range:[0, 15], step: 1
--avalon7-voltage-offset Set Avalon7 default offset of core voltage, range:[-2, 1], step: 1
--avalon7-freq Set Avalon7 default frequency, range:[24, 1404], step: 12, example: 500
--avalon7-freq-sel <arg> Set Avalon7 default frequency select, range:[0, 5], step: 1, example: 3 (default: 0)
--avalon7-fan Set Avalon7 target fan speed, range:[0, 100], step: 1, example: 0-100
Expand Down Expand Up @@ -612,6 +614,8 @@ Avalon4 Devices
Avalon7 Devices

--avalon7-voltage Set Avalon7 default core voltage, in millivolts, step: 78
--avalon7-voltage-level Set Avalon7 default level of core voltage, range:[0, 15], step: 1
--avalon7-voltage-offset Set Avalon7 default offset of core voltage, range:[-2, 1], step: 1
--avalon7-freq Set Avalon7 default frequency, range:[24, 1404], step: 12, example: 500
--avalon7-freq-sel <arg> Set Avalon7 default frequency select, range:[0, 5], step: 1, example: 3 (default: 0)
--avalon7-fan Set Avalon7 target fan speed, range:[0, 100], step: 1, example: 0-100
Expand Down
4 changes: 4 additions & 0 deletions README
View file
Original file line number Diff line number Diff line change
Expand Up @@ -232,6 +232,8 @@ Options for both config file and command line:
--avalon4-least-pll <arg> Set least pll check threshold for smart speed mode 2 (default: 768)
--avalon4-most-pll <arg> Set most pll check threshold for smart speed mode 2 (default: 256)
--avalon7-voltage Set Avalon7 default core voltage, in millivolts, step: 78
--avalon7-voltage-level Set Avalon7 default level of core voltage, range:[0, 15], step: 1
--avalon7-voltage-offset Set Avalon7 default offset of core voltage, range:[-2, 1], step: 1
--avalon7-freq Set Avalon7 default frequency, range:[24, 1404], step: 12, example: 500
--avalon7-freq-sel <arg> Set Avalon7 default frequency select, range:[0, 5], step: 1, example: 3 (default: 0)
--avalon7-fan Set Avalon7 target fan speed, range:[0, 100], step: 1, example: 0-100
Expand Down Expand Up @@ -393,6 +395,8 @@ ASIC only options:
--avalon4-aucspeed <arg> Set Avalon4 AUC IIC bus speed (default: 400000)
--avalon4-aucxdelay <arg> Set Avalon4 AUC IIC xfer read delay, 4800 ~= 1ms (default: 9600)
--avalon7-voltage Set Avalon7 default core voltage, in millivolts, step: 78
--avalon7-voltage-level Set Avalon7 default level of core voltage, range:[0, 15], step: 1
--avalon7-voltage-offset Set Avalon7 default offset of core voltage, range:[-2, 1], step: 1
--avalon7-freq Set Avalon7 default frequency, range:[24, 1404], step: 12, example: 500
--avalon7-freq-sel <arg> Set Avalon7 default frequency select, range:[0, 5], step: 1, example: 3 (default: 0)
--avalon7-fan Set Avalon7 target fan speed, range:[0, 100], step: 1, example: 0-100
Expand Down
8 changes: 8 additions & 0 deletions cgminer.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -257,6 +257,8 @@ static char *opt_set_avalon4_freq;
#ifdef USE_AVALON7
static char *opt_set_avalon7_fan;
static char *opt_set_avalon7_voltage;
static char *opt_set_avalon7_voltage_level;
static char *opt_set_avalon7_voltage_offset;
static char *opt_set_avalon7_freq;
#endif
#ifdef USE_AVALON_MINER
Expand Down Expand Up @@ -1405,6 +1407,12 @@ static struct opt_table opt_config_table[] = {
OPT_WITH_CBARG("--avalon7-voltage",
set_avalon7_voltage, NULL, &opt_set_avalon7_voltage,
"Set Avalon7 default core voltage, in millivolts, step: 78"),
OPT_WITH_CBARG("--avalon7-voltage-level",
set_avalon7_voltage_level, NULL, &opt_set_avalon7_voltage_level,
"Set Avalon7 default level of core voltage, range:[0, 15], step: 1"),
OPT_WITH_CBARG("--avalon7-voltage-offset",
set_avalon7_voltage_offset, NULL, &opt_set_avalon7_voltage_offset,
"Set Avalon7 default offset of core voltage, range:[-2, 1], step: 1"),
OPT_WITH_CBARG("--avalon7-freq",
set_avalon7_freq, NULL, &opt_set_avalon7_freq,
"Set Avalon7 default frequency, range:[24, 1404], step: 12, example: 500"),
Expand Down
127 changes: 99 additions & 28 deletions driver-avalon7.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,9 @@ int opt_avalon7_temp_target = AVA7_DEFAULT_TEMP_TARGET;
int opt_avalon7_fan_min = AVA7_DEFAULT_FAN_MIN;
int opt_avalon7_fan_max = AVA7_DEFAULT_FAN_MAX;

int opt_avalon7_voltage = AVA7_DEFAULT_VOLTAGE;
int opt_avalon7_voltage = AVA7_INVALID_VOLTAGE;
int opt_avalon7_voltage_offset = AVA7_DEFAULT_VOLTAGE_OFFSET;

int opt_avalon7_freq[AVA7_DEFAULT_PLL_CNT] = {AVA7_DEFAULT_FREQUENCY_0,
AVA7_DEFAULT_FREQUENCY_1,
AVA7_DEFAULT_FREQUENCY_2,
Expand Down Expand Up @@ -178,6 +180,33 @@ uint32_t cpm_table[] =
0x01274813,
};

struct avalon7_dev_description avalon7_dev_table[] = {
{
"711",
711,
4,
18,
AVA7_MM711_VOUT_ADC_RATIO,
4981
},
{
"721",
721,
4,
18,
AVA7_MM721_VOUT_ADC_RATIO,
4981
},
{
"741",
741,
4,
22,
AVA7_MM741_VOUT_ADC_RATIO,
4825,
}
};

static uint32_t api_get_cpm(uint32_t freq)
{
return cpm_table[freq / 12 - 2];
Expand All @@ -191,7 +220,15 @@ static uint32_t encode_voltage(uint32_t volt)
if (volt < AVA7_DEFAULT_VOLTAGE_MIN)
volt = AVA7_DEFAULT_VOLTAGE_MIN;

return 0x8000 | ((volt - AVA7_DEFAULT_VOLTAGE_MIN) / 78);
return 0x8000 | ((volt - AVA7_DEFAULT_VOLTAGE_MIN) / AVA7_DEFAULT_VOLTAGE_STEP);
}

static uint32_t convert_voltage_level(uint32_t level)
{
if (level > AVA7_DEFAULT_VOLTAGE_LEVEL_MAX)
level = AVA7_DEFAULT_VOLTAGE_LEVEL_MAX;

return AVA7_DEFAULT_VOLTAGE_MIN + level * AVA7_DEFAULT_VOLTAGE_STEP;
}

static uint32_t decode_voltage(struct avalon7_info *info, int modular_id, uint32_t volt)
Expand Down Expand Up @@ -336,6 +373,38 @@ char *set_avalon7_voltage(char *arg)
return NULL;
}

char *set_avalon7_voltage_level(char *arg)
{
int val, ret;

ret = sscanf(arg, "%d", &val);
if (ret < 1)
return "No value passed to avalon7-voltage-level";

if (val < AVA7_DEFAULT_VOLTAGE_LEVEL_MIN || val > AVA7_DEFAULT_VOLTAGE_LEVEL_MAX)
return "Invalid value passed to avalon7-voltage-level";

opt_avalon7_voltage = convert_voltage_level(val);

return NULL;
}

char *set_avalon7_voltage_offset(char *arg)
{
int val, ret;

ret = sscanf(arg, "%d", &val);
if (ret < 1)
return "No value passed to avalon7-voltage-offset";

if (val < AVA7_DEFAULT_VOLTAGE_OFFSET_MIN || val > AVA7_DEFAULT_VOLTAGE_OFFSET_MAX)
return "Invalid value passed to avalon7-voltage-offset";

opt_avalon7_voltage_offset = val;

return NULL;
}

static int avalon7_init_pkg(struct avalon7_pkg *pkg, uint8_t type, uint8_t idx, uint8_t cnt)
{
unsigned short crc;
Expand Down Expand Up @@ -383,7 +452,7 @@ static inline int get_temp_max(struct avalon7_info *info, int addr)
int i;
int max = -273;

for (i = 0; i < AVA7_DEFAULT_MINER_CNT; i++) {
for (i = 0; i < info->miner_count[addr]; i++) {
if (info->temp[addr][i][3] > max)
max = info->temp[addr][i][3];
}
Expand Down Expand Up @@ -1319,6 +1388,7 @@ static void detect_modules(struct cgpu_info *avalon7)
struct avalon7_ret ret_pkg;
uint32_t tmp;
int i, j, err, rlen;
uint8_t dev_index;
uint8_t rbuf[AVA7_AUC_P_SIZE];

/* Detect new modules here */
Expand Down Expand Up @@ -1364,39 +1434,37 @@ static void detect_modules(struct cgpu_info *avalon7)
} else
info->conn_overloaded = false;

memcpy(info->mm_version[i], ret_pkg.data + AVA7_MM_DNA_LEN, AVA7_MM_VER_LEN);
info->mm_version[i][AVA7_MM_VER_LEN] = '\0';
for (dev_index = 0; dev_index < (sizeof(avalon7_dev_table) / sizeof(avalon7_dev_table[0])); dev_index++) {
if (!strncmp((char *)&(info->mm_version[i]), (char *)(avalon7_dev_table[dev_index].dev_id_str), 3)) {
info->mod_type[i] = avalon7_dev_table[dev_index].mod_type;
info->miner_count[i] = avalon7_dev_table[dev_index].miner_count;
info->asic_count[i] = avalon7_dev_table[dev_index].asic_count;
info->vout_adc_ratio[i] = avalon7_dev_table[dev_index].vout_adc_ratio;
break;
}
}
if (dev_index == (sizeof(avalon7_dev_table) / sizeof(avalon7_dev_table[0]))) {
applog(LOG_NOTICE, "%s-%d: The modular version %s cann't be support",
avalon7->drv->name, avalon7->device_id, info->mm_version[i]);
break;
}

info->enable[i] = 1;
cgtime(&info->elapsed[i]);
memcpy(info->mm_dna[i], ret_pkg.data, AVA7_MM_DNA_LEN);
memcpy(info->mm_version[i], ret_pkg.data + AVA7_MM_DNA_LEN, AVA7_MM_VER_LEN);
memcpy(&tmp, ret_pkg.data + AVA7_MM_DNA_LEN + AVA7_MM_VER_LEN, 4);
tmp = be32toh(tmp);
info->mm_version[i][AVA7_MM_VER_LEN] = '\0';
info->total_asics[i] = tmp;

info->miner_count[i] = AVA7_DEFAULT_MINER_CNT;
if (!strncmp((char *)&(info->mm_version[i]), AVA7_MM711_PREFIXSTR, 3)) {
info->mod_type[i] = AVA7_TYPE_MM711;
info->asic_count[i] = AVA7_MM711_ASIC_CNT;
info->vout_adc_ratio[i] = AVA7_MM711_VOUT_ADC_RATIO;
}

if (!strncmp((char *)&(info->mm_version[i]), AVA7_MM721_PREFIXSTR, 3)) {
info->mod_type[i] = AVA7_TYPE_MM721;
info->asic_count[i] = AVA7_MM721_ASIC_CNT;
info->vout_adc_ratio[i] = AVA7_MM721_VOUT_ADC_RATIO;
}

if (!strncmp((char *)&(info->mm_version[i]), AVA7_MM741_PREFIXSTR, 3)) {
info->mod_type[i] = AVA7_TYPE_MM741;
info->asic_count[i] = AVA7_MM741_ASIC_CNT;
info->vout_adc_ratio[i] = AVA7_MM741_VOUT_ADC_RATIO;
}

info->temp_overheat[i] = AVA7_DEFAULT_TEMP_OVERHEAT;
info->temp_target[i] = opt_avalon7_temp_target;
info->fan_pct[i] = opt_avalon7_fan_min + (opt_avalon7_fan_min + opt_avalon7_fan_max) / 3;
for (j = 0; j < info->miner_count[i]; j++) {
info->set_voltage[i][j] = opt_avalon7_voltage;
if (opt_avalon7_voltage == AVA7_INVALID_VOLTAGE)
info->set_voltage[i][j] = avalon7_dev_table[dev_index].set_voltage;
else
info->set_voltage[i][j] = opt_avalon7_voltage;
info->get_voltage[i][j] = 0;
info->get_vin[i][j] = 0;
}
Expand Down Expand Up @@ -1613,7 +1681,8 @@ static void avalon7_set_voltage(struct cgpu_info *avalon7, int addr, unsigned in

/* FIXME: miner_count should <= 8 */
for (i = 0; i < info->miner_count[addr]; i++) {
tmp = be32toh(encode_voltage(voltage[i]));
tmp = be32toh(encode_voltage(voltage[i] +
opt_avalon7_voltage_offset * AVA7_DEFAULT_VOLTAGE_STEP));
memcpy(send_pkg.data + i * 4, &tmp, 4);
}
applog(LOG_DEBUG, "%s-%d-%d: avalon7 set voltage miner %d, (%d-%d)",
Expand Down Expand Up @@ -1661,7 +1730,7 @@ static void avalon7_set_freq(struct cgpu_info *avalon7, int addr, int miner_id,
miner_id, be32toh(tmp));

/* Package the data */
avalon7_init_pkg(&send_pkg, AVA7_P_SET_PLL, miner_id + 1, AVA7_DEFAULT_MINER_CNT);
avalon7_init_pkg(&send_pkg, AVA7_P_SET_PLL, miner_id + 1, info->miner_count[addr]);

if (addr == AVA7_MODULE_BROADCAST)
avalon7_send_bc_pkgs(avalon7, &send_pkg);
Expand Down Expand Up @@ -2293,6 +2362,8 @@ static struct api_data *avalon7_api_stats(struct cgpu_info *avalon7)
}

root = api_add_bool(root, "Connection Overloaded", &info->conn_overloaded, true);
root = api_add_int(root, "Voltage Offset", &opt_avalon7_voltage_offset, true);
root = api_add_uint32(root, "Nonce Mask", &opt_avalon7_nonce_mask, true);

return root;
}
Expand Down
35 changes: 20 additions & 15 deletions driver-avalon7.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,10 +19,6 @@
#define AVA7_TEMP_FREQADJ 104
#define AVA7_FREQUENCY_MAX 1404

#define AVA7_MM711_ASIC_CNT 18
#define AVA7_MM721_ASIC_CNT 18
#define AVA7_MM741_ASIC_CNT 22

#define AVA7_DEFAULT_FAN_MIN 5 /* % */
#define AVA7_DEFAULT_FAN_MAX 100
#define AVA7_DEFAULT_FAN_INTERVAL 15 /* Seconds */
Expand All @@ -32,8 +28,16 @@
#define AVA7_DEFAULT_TEMP_HYSTERESIS 5

#define AVA7_DEFAULT_VOLTAGE_MIN 3889
#define AVA7_DEFAULT_VOLTAGE 4981
#define AVA7_DEFAULT_VOLTAGE_MAX 5059
#define AVA7_INVALID_VOLTAGE 0
#define AVA7_DEFAULT_VOLTAGE_STEP 78

#define AVA7_DEFAULT_VOLTAGE_LEVEL_MIN 0
#define AVA7_DEFAULT_VOLTAGE_LEVEL_MAX 15

#define AVA7_DEFAULT_VOLTAGE_OFFSET_MIN -2
#define AVA7_DEFAULT_VOLTAGE_OFFSET 0
#define AVA7_DEFAULT_VOLTAGE_OFFSET_MAX 1

#define AVA7_DEFAULT_FREQUENCY_MIN 24 /* NOTE: It cann't support 0 */
#define AVA7_DEFAULT_FREQUENCY_0 600
Expand Down Expand Up @@ -138,16 +142,6 @@
#define AVA7_MODULE_BROADCAST 0
/* End of avalon7 protocol package type */

#define AVA7_MM711_PREFIXSTR "711"
#define AVA7_MM721_PREFIXSTR "721"
#define AVA7_MM741_PREFIXSTR "741"
#define AVA7_MM_VERNULL "NONE"

#define AVA7_TYPE_MM711 711
#define AVA7_TYPE_MM721 721
#define AVA7_TYPE_MM741 741
#define AVA7_TYPE_NULL 00

#define AVA7_IIC_RESET 0xa0
#define AVA7_IIC_INIT 0xa1
#define AVA7_IIC_DEINIT 0xa2
Expand Down Expand Up @@ -285,6 +279,15 @@ struct avalon7_iic_info {
} iic_param;
};

struct avalon7_dev_description {
uint8_t dev_id_str[8];
int mod_type;
uint8_t miner_count; /* it should not greater than AVA7_DEFAULT_MINER_CNT */
uint8_t asic_count; /* asic count each miner, it should not great than AVA7_DEFAULT_ASIC_MAX */
uint16_t vout_adc_ratio;
uint32_t set_voltage;
};

#define AVA7_WRITE_SIZE (sizeof(struct avalon7_pkg))
#define AVA7_READ_SIZE AVA7_WRITE_SIZE

Expand All @@ -294,6 +297,8 @@ struct avalon7_iic_info {
extern char *set_avalon7_fan(char *arg);
extern char *set_avalon7_freq(char *arg);
extern char *set_avalon7_voltage(char *arg);
extern char *set_avalon7_voltage_level(char *arg);
extern char *set_avalon7_voltage_offset(char *arg);
extern int opt_avalon7_temp_target;
extern int opt_avalon7_polling_delay;
extern int opt_avalon7_aucspeed;
Expand Down
Loading

0 comments on commit 1afb29f

Please sign in to comment.