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Machine: redefine exception codes to match RISC-V s/mcause register.
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The ECAUSE_INSN_MISALIGNED is not defined for now because
it is encoded as 0 which overlaps with simulator EXCAUSE_NONE
definition for now.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
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@ppisa
ppisa committed Nov 25, 2023
1 parent 06acec4 commit 4ea4153
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Showing 7 changed files with 83 additions and 46 deletions.
16 changes: 11 additions & 5 deletions src/cli/main.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -356,12 +356,13 @@ void configure_osemu(QCommandLineParser &p, MachineConfig &config, Machine *mach
QCoreApplication::exit(1);
}
}
const static machine::ExceptionCause ecall_variats[] = {machine::EXCAUSE_ECALL_ANY,
machine::EXCAUSE_ECALL_M, machine::EXCAUSE_ECALL_S, machine::EXCAUSE_ECALL_U};

if (config.osemu_enable()) {
auto *osemu_handler = new osemu::OsSyscallExceptionHandler(
config.osemu_known_syscall_stop(), config.osemu_unknown_syscall_stop(),
config.osemu_fs_root());
machine->register_exception_handler(machine::EXCAUSE_SYSCALL, osemu_handler);
if (std_out) {
machine->connect(
osemu_handler, &osemu::OsSyscallExceptionHandler::char_written,
Expand All @@ -370,11 +371,16 @@ void configure_osemu(QCommandLineParser &p, MachineConfig &config, Machine *mach
/*connect(
osemu_handler, &osemu::OsSyscallExceptionHandler::rx_byte_pool, terminal,
&TerminalDock::rx_byte_pool);*/
machine->set_step_over_exception(machine::EXCAUSE_SYSCALL, true);
machine->set_stop_on_exception(machine::EXCAUSE_SYSCALL, false);
for (unsigned int i = 0; i < sizeof(ecall_variats)/sizeof(ecall_variats[0]); i++) {
machine->register_exception_handler(ecall_variats[i], osemu_handler);
machine->set_step_over_exception(ecall_variats[i], true);
machine->set_stop_on_exception(ecall_variats[i], false);
}
} else {
machine->set_step_over_exception(machine::EXCAUSE_SYSCALL, false);
machine->set_stop_on_exception(machine::EXCAUSE_SYSCALL, config.osemu_exception_stop());
for (unsigned int i = 0; i < sizeof(ecall_variats)/sizeof(ecall_variats[0]); i++) {
machine->set_step_over_exception(ecall_variats[i], false);
machine->set_stop_on_exception(ecall_variats[i], config.osemu_exception_stop());
}
}
}

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26 changes: 17 additions & 9 deletions src/cli/reporter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -35,17 +35,25 @@ void Reporter::machine_exit() {
constexpr const char *get_exception_name(ExceptionCause exception_cause) {
switch (exception_cause) {
case EXCAUSE_NONE: return "NONE";
case EXCAUSE_INT: return "INT";
case EXCAUSE_UNKNOWN: return "UNKNOWN";
case EXCAUSE_ADDRL: return "ADDRL";
case EXCAUSE_ADDRS: return "ADDRS";
case EXCAUSE_IBUS: return "IBUS";
case EXCAUSE_DBUS: return "DBUS";
case EXCAUSE_SYSCALL: return "SYSCALL";
case EXCAUSE_INSN_FAULT: return "INSN_FAULT";
case EXCAUSE_INSN_ILLEGAL: return "INSN_ILLEGAL";
case EXCAUSE_BREAK: return "BREAK";
case EXCAUSE_OVERFLOW: return "OVERFLOW";
case EXCAUSE_TRAP: return "TRAP";
case EXCAUSE_LOAD_MISALIGNED: return "LOAD_MISALIGNED";
case EXCAUSE_LOAD_FAULT: return "LOAD_FAULT";
case EXCAUSE_STORE_MISALIGNED: return "STORE_MISALIGNED";
case EXCAUSE_STORE_FAULT: return "STORE_FAULT";
case EXCAUSE_ECALL_U: return "ECALL_U";
case EXCAUSE_ECALL_S: return "ECALL_S";
case EXCAUSE_RESERVED_10: return "RESERVED_10";
case EXCAUSE_ECALL_M: return "ECALL_M";
case EXCAUSE_INSN_PAGE_FAULT: return "INSN_PAGE_FAULT";
case EXCAUSE_LOAD_PAGE_FAULT: return "LOAD_PAGE_FAULT";
case EXCAUSE_RESERVED_14: return "RESERVED_14";
case EXCAUSE_STORE_PAGE_FAULT: return "STORE_PAGE_FAULT";
// Simulator specific exception cause codes, alliases
case EXCAUSE_HWBREAK: return "HWBREAK";
case EXCAUSE_ECALL_ANY: return "ECALL_ANY";
case EXCAUSE_INT: return "INT";
default: UNREACHABLE
}
}
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19 changes: 13 additions & 6 deletions src/gui/mainwindow/mainwindow.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -263,22 +263,29 @@ void MainWindow::create_core(

set_speed(); // Update machine speed to current settings

const static machine::ExceptionCause ecall_variats[] = {machine::EXCAUSE_ECALL_ANY,
machine::EXCAUSE_ECALL_M, machine::EXCAUSE_ECALL_S, machine::EXCAUSE_ECALL_U};

if (config.osemu_enable()) {
auto *osemu_handler = new osemu::OsSyscallExceptionHandler(
config.osemu_known_syscall_stop(), config.osemu_unknown_syscall_stop(),
config.osemu_fs_root());
machine->register_exception_handler(machine::EXCAUSE_SYSCALL, osemu_handler);
connect(
osemu_handler, &osemu::OsSyscallExceptionHandler::char_written, terminal.data(),
QOverload<int, unsigned int>::of(&TerminalDock::tx_byte));
connect(
osemu_handler, &osemu::OsSyscallExceptionHandler::rx_byte_pool, terminal.data(),
&TerminalDock::rx_byte_pool);
machine->set_step_over_exception(machine::EXCAUSE_SYSCALL, true);
machine->set_stop_on_exception(machine::EXCAUSE_SYSCALL, false);
for (unsigned int i = 0; i < sizeof(ecall_variats)/sizeof(ecall_variats[0]); i++) {
machine->register_exception_handler(ecall_variats[i], osemu_handler);
machine->set_step_over_exception(ecall_variats[i], true);
machine->set_stop_on_exception(ecall_variats[i], false);
}
} else {
machine->set_step_over_exception(machine::EXCAUSE_SYSCALL, false);
machine->set_stop_on_exception(machine::EXCAUSE_SYSCALL, config.osemu_exception_stop());
for (unsigned int i = 0; i < sizeof(ecall_variats)/sizeof(ecall_variats[0]); i++) {
machine->set_step_over_exception(ecall_variats[i], false);
machine->set_stop_on_exception(ecall_variats[i], config.osemu_exception_stop());
}
}

// Connect machine signals and slots
Expand Down Expand Up @@ -773,4 +780,4 @@ void MainWindow::build_execute_no_check() {
proc->setWorkingDirectory(work_dir);
proc->start("make", {}, QProcess::Unbuffered | QProcess::ReadOnly);
}
}
}
26 changes: 17 additions & 9 deletions src/gui/windows/coreview/data.h
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Original file line number Diff line number Diff line change
Expand Up @@ -25,17 +25,25 @@ using machine::RegisterValue;

static const std::unordered_map<unsigned, QString> EXCEPTION_NAME_TABLE = {
{ machine::EXCAUSE_NONE, QStringLiteral("NONE") },
{ machine::EXCAUSE_INT, QStringLiteral("INT") },
{ machine::EXCAUSE_ADDRL, QStringLiteral("ADDRL") },
{ machine::EXCAUSE_ADDRS, QStringLiteral("ADDRS") },
{ machine::EXCAUSE_IBUS, QStringLiteral("IBUS") },
{ machine::EXCAUSE_DBUS, QStringLiteral("DBUS") },
{ machine::EXCAUSE_SYSCALL, QStringLiteral("SYSCALL") },
{ machine::EXCAUSE_INSN_FAULT, QStringLiteral("I_FAULT") },
{ machine::EXCAUSE_INSN_ILLEGAL, QStringLiteral("I_ILLEGAL") },
{ machine::EXCAUSE_BREAK, QStringLiteral("BREAK") },
{ machine::EXCAUSE_OVERFLOW, QStringLiteral("OVERFLOW") },
{ machine::EXCAUSE_TRAP, QStringLiteral("TRAP") },
{ machine::EXCAUSE_LOAD_MISALIGNED, QStringLiteral("L_MALIGN") },
{ machine::EXCAUSE_LOAD_FAULT, QStringLiteral("L_FAULT") },
{ machine::EXCAUSE_STORE_MISALIGNED, QStringLiteral("S_MALIGN") },
{ machine::EXCAUSE_STORE_FAULT, QStringLiteral("S_FAULT") },
{ machine::EXCAUSE_ECALL_U, QStringLiteral("ECALL_U") },
{ machine::EXCAUSE_ECALL_S, QStringLiteral("ECALL_S") },
{ machine::EXCAUSE_RESERVED_10, QStringLiteral("RES_10") },
{ machine::EXCAUSE_ECALL_M, QStringLiteral("ECALL_M") },
{ machine::EXCAUSE_INSN_PAGE_FAULT, QStringLiteral("I_PGFAULT") },
{ machine::EXCAUSE_LOAD_PAGE_FAULT, QStringLiteral("L_PGFAULT") },
{ machine::EXCAUSE_RESERVED_14, QStringLiteral("RES_14") },
{ machine::EXCAUSE_STORE_PAGE_FAULT, QStringLiteral("S_PGFAULT") },
// Simulator specific exception cause codes, alliases
{ machine::EXCAUSE_HWBREAK, QStringLiteral("HWBREAK") },
{ machine::EXCAUSE_UNKNOWN, QStringLiteral("UNKNOWN") },
{ machine::EXCAUSE_ECALL_ANY, QStringLiteral("ECALL") },
{ machine::EXCAUSE_INT, QStringLiteral("INT") },
};

static const std::unordered_map<unsigned, QString> STALL_TEXT_TABLE = {
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6 changes: 3 additions & 3 deletions src/machine/core.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -129,7 +129,7 @@ bool Core::handle_exception(
Address next_addr,
Address jump_branch_pc,
Address mem_ref_addr) {
if (excause == EXCAUSE_UNKNOWN) {
if (excause == EXCAUSE_INSN_ILLEGAL) {
throw SIMULATOR_EXCEPTION(
UnsupportedInstruction, "Instruction with following encoding is not supported",
QString::number(inst.data(), 16));
Expand Down Expand Up @@ -224,7 +224,7 @@ DecodeState Core::decode(const FetchInterstage &dt) {

dt.inst.flags_alu_op_mem_ctl(flags, alu_op, mem_ctl);

if (!(flags & IMF_SUPPORTED)) { excause = EXCAUSE_UNKNOWN; }
if (!(flags & IMF_SUPPORTED)) { excause = EXCAUSE_INSN_ILLEGAL; }

RegisterId num_rs = (flags & (IMF_ALU_REQ_RS | IMF_ALU_RS_ID)) ? dt.inst.rs() : 0;
RegisterId num_rt = (flags & IMF_ALU_REQ_RT) ? dt.inst.rt() : 0;
Expand All @@ -246,7 +246,7 @@ DecodeState Core::decode(const FetchInterstage &dt) {
if (flags & IMF_EBREAK) {
excause = EXCAUSE_BREAK;
} else if (flags & IMF_ECALL) {
excause = EXCAUSE_SYSCALL;
excause = EXCAUSE_ECALL_ANY;
}
}
if (flags & IMF_FORCE_W_OP)
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34 changes: 21 additions & 13 deletions src/machine/machinedefs.h
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Expand Up @@ -40,19 +40,27 @@ static_assert(is_special_access((AccessControl)11), "");

enum ExceptionCause {
EXCAUSE_NONE = 0, // Use zero as default value when no exception is
// pending.
EXCAUSE_INT = 1, // Int is 0 on real CPU and in Cause register.
EXCAUSE_UNKNOWN = 2,
EXCAUSE_ADDRL = 4,
EXCAUSE_ADDRS = 5,
EXCAUSE_IBUS = 6,
EXCAUSE_DBUS = 7,
EXCAUSE_SYSCALL = 8,
EXCAUSE_BREAK = 9,
EXCAUSE_OVERFLOW = 12,
EXCAUSE_TRAP = 13,
EXCAUSE_HWBREAK = 14,
EXCAUSE_COUNT = 15,
// ECAUSE_INSN_MISALIGNED - not defined for now, overlaps with EXCAUSE_NON
EXCAUSE_INSN_FAULT = 1, // Instruction access fault
EXCAUSE_INSN_ILLEGAL = 2, // Illegal instruction
EXCAUSE_BREAK = 3, // Breakpoint
EXCAUSE_LOAD_MISALIGNED = 4, // Load address misaligned
EXCAUSE_LOAD_FAULT = 5, // Load access fault
EXCAUSE_STORE_MISALIGNED = 6, // Store/AMO address misaligned
EXCAUSE_STORE_FAULT = 7, // Store/AMO access fault
EXCAUSE_ECALL_U = 8, // Environment call from U-mode
EXCAUSE_ECALL_S = 9, // Environment call from S-mode
EXCAUSE_RESERVED_10 = 10, // Reserved
EXCAUSE_ECALL_M = 11, // Environment call from M-mode
EXCAUSE_INSN_PAGE_FAULT = 12, // Instruction page fault
EXCAUSE_LOAD_PAGE_FAULT = 13, // Load page fault
EXCAUSE_RESERVED_14 = 14, // Reserved
EXCAUSE_STORE_PAGE_FAULT = 15, // Store/AMO page fault
// Simulator specific exception cause codes, alliases
EXCAUSE_HWBREAK = 16,
EXCAUSE_ECALL_ANY = 17, // sythetic exception to mark ECALL instruction
EXCAUSE_INT = 18, // External/asynchronous interrupt, bit 32 or 63
EXCAUSE_COUNT = 19,
};

enum LocationStatus {
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2 changes: 1 addition & 1 deletion tests/cli/stalls/stdout.txt
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Expand Up @@ -2,4 +2,4 @@ Machine stopped on BREAK exception.
Machine state report:
PC:0x00000244
R0:0x00000000 R1:0x00000011 R2:0x00000022 R3:0x00000033 R4:0x00000000 R5:0x00000055 R6:0x00000000 R7:0x00000000 R8:0x00000000 R9:0x00000000 R10:0x00000000 R11:0x00000000 R12:0x00000000 R13:0x00000000 R14:0x00000000 R15:0x00000000 R16:0x00000000 R17:0x00000000 R18:0x00000000 R19:0x00000000 R20:0x00000000 R21:0x00000011 R22:0x00000022 R23:0x00000033 R24:0x00000044 R25:0x00000055 R26:0x00000000 R27:0x00000000 R28:0x00000000 R29:0x00000000 R30:0x00000000 R31:0x00000000
mvendorid: 0x00000000 marchid: 0x00000000 mimpid: 0x00000000 mhardid: 0x00000000 mstatus: 0x00000000 mie: 0x00000000 mtvec: 0x00000000 mscratch: 0x00000000 mepc: 0x00000240 mcause: 0x00000009 mtval: 0x00000000 mip: 0x00000000 mtinsr: 0x00000000 mtval2: 0x00000000 mcycle: 0x0000000c minstret: 0x0000000b
mvendorid: 0x00000000 marchid: 0x00000000 mimpid: 0x00000000 mhardid: 0x00000000 mstatus: 0x00000000 mie: 0x00000000 mtvec: 0x00000000 mscratch: 0x00000000 mepc: 0x00000240 mcause: 0x00000003 mtval: 0x00000000 mip: 0x00000000 mtinsr: 0x00000000 mtval2: 0x00000000 mcycle: 0x0000000c minstret: 0x0000000b

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