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Ryzen 9 7950X #378

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cyring opened this issue Nov 28, 2022 · 226 comments
Closed

Ryzen 9 7950X #378

cyring opened this issue Nov 28, 2022 · 226 comments

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@cyring
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cyring commented Nov 28, 2022

7950X

  • Temperature is zero fixed.
  • Vcore appears not OK: need to test latest Rembrandt formula or to create a new one depending on datasheet availability.
  • Architecture is Zen4
@cyring
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cyring commented Nov 29, 2022

  • Using master 1.92.4

7950X

@cyring
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cyring commented Nov 30, 2022

$ lspci -nn
00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14d8]
00:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Device [1022:14d9]
00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:02.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:02.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:02.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14db]
00:03.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:04.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14da]
00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:08.3 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:14dd]
00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 71)
00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51)
00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e0]
00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e1]
00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e2]
00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e3]
00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e4]
00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e5]
00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e6]
00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:14e7]
01:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 XL Upstream Port of PCI Express Switch [1002:1478] (rev c1)
02:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 10 XL Downstream Port of PCI Express Switch [1002:1479]
03:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 21 [Radeon RX 6800/6800 XT / 6900 XT] [1002:73bf] (rev c1)
03:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 21/23 HDMI/DP Audio Controller [1002:ab28]
03:00.2 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:73a6]
03:00.3 Serial bus controller [0c80]: Advanced Micro Devices, Inc. [AMD/ATI] Navi 21 USB [1002:73a4]
04:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f4] (rev 01)
05:00.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:04.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:05.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:06.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:07.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:08.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:09.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0a.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0b.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0c.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
05:0d.0 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f5] (rev 01)
06:00.0 Non-Volatile memory controller [0108]: Sandisk Corp WD PC SN810 / Black SN850 NVMe SSD [15b7:5011] (rev 01)
0b:00.0 SATA controller [0106]: ASMedia Technology Inc. ASM1062 Serial ATA Controller [1b21:0612] (rev 02)
0d:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8125 2.5GbE Controller [10ec:8125] (rev 05)
0e:00.0 Network controller [0280]: MEDIATEK Corp. MT7922 802.11ax PCI Express Wireless Network Adapter [14c3:0616]
0f:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f7] (rev 01)
10:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] Device [1022:43f6] (rev 01)
11:00.0 Non-Volatile memory controller [0108]: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961/SM963 [144d:a804]
12:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Device [1022:14de] (rev c1)
12:00.2 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] VanGogh PSP/CCP [1022:1649]
12:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b6]
12:00.4 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b7]
12:00.6 Audio device [0403]: Advanced Micro Devices, Inc. [AMD] Family 17h/19h HD Audio Controller [1022:15e3]
13:00.0 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15b8]
# rdmsr -ax 0xC0010299
a1000
... 
a1000

@cyring
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cyring commented Dec 1, 2022

$ corefreq-cli -s -n -m -n -V 1 -n -W 1 -n -c 1 -n -i 1 -n -B -n -k -n -M
Processor                                  [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture                                                   [Zen4/Raphael]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a601203]
|- Signature                                                           [  AF_61]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 32/ 32]
|- Base Clock                                                          [ 99.998]
|- Frequency            (MHz)                      Ratio                        
                 Min   2999.95                    <  30 >                       
                 Max   4499.93                    <  45 >                       
|- Factory                                                             [100.000]
                       4500                       [  45 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   2999.95                    <  30 >                       
|- Turbo Boost                                                         [ UNLOCK]
                 XFR   5799.91                    [  58 ]                       
                 CPB   5699.91                    [  57 ]                       
                  1C   2999.95                    <  30 >                       
|- Uncore                                                              [   LOCK]
                 CLK    899.99                    [   9 ]                       
                 MEM   2799.96                    [  28 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [Capable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
Security Features                                                               
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   <OFF>
|- Virtualization                                                    SVM   [OFF]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6, 16 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Continuous Performance Control                               _CPC       [OFF]
|- Collaborative Processor Performance Control                  CPPC       <OFF>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #1       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #2       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #3       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #4       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #5       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #6       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #7       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #8       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #9       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #10      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #11      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #12      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #13      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #14      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #15      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #16      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #17      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #18      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #19      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #20      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #21      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #22      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #23      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #24      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #25      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #26      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #27      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #28      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #29      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #30      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #31      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [  0:  0 C]
|- CPPC Energy Preference                                       CPPC   [Capable]
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8      1024  8 i   65536 16w 
001:  0    2   0  0   1  0      32  8        32  8      1024  8 i   65536 16w 
002:  0    4   0  0   2  0      32  8        32  8      1024  8 i   65536 16w 
003:  0    6   0  0   3  0      32  8        32  8      1024  8 i   65536 16w 
004:  0    8   0  1   4  0      32  8        32  8      1024  8 i   65536 16w 
005:  0   10   0  1   5  0      32  8        32  8      1024  8 i   65536 16w 
006:  0   12   0  1   6  0      32  8        32  8      1024  8 i   65536 16w 
007:  0   14   0  1   7  0      32  8        32  8      1024  8 i   65536 16w 
008:  0   16   1  2   8  0      32  8        32  8      1024  8 i   65536 16w 
009:  0   18   1  2   9  0      32  8        32  8      1024  8 i   65536 16w 
010:  0   20   1  2  10  0      32  8        32  8      1024  8 i   65536 16w 
011:  0   22   1  2  11  0      32  8        32  8      1024  8 i   65536 16w 
012:  0   24   1  3  12  0      32  8        32  8      1024  8 i   65536 16w 
013:  0   26   1  3  13  0      32  8        32  8      1024  8 i   65536 16w 
014:  0   28   1  3  14  0      32  8        32  8      1024  8 i   65536 16w 
015:  0   30   1  3  15  0      32  8        32  8      1024  8 i   65536 16w 
016:  0    1   0  0   0  1      32  8        32  8      1024  8 i   65536 16w 
017:  0    3   0  0   1  1      32  8        32  8      1024  8 i   65536 16w 
018:  0    5   0  0   2  1      32  8        32  8      1024  8 i   65536 16w 
019:  0    7   0  0   3  1      32  8        32  8      1024  8 i   65536 16w 
020:  0    9   0  1   4  1      32  8        32  8      1024  8 i   65536 16w 
021:  0   11   0  1   5  1      32  8        32  8      1024  8 i   65536 16w 
022:  0   13   0  1   6  1      32  8        32  8      1024  8 i   65536 16w 
023:  0   15   0  1   7  1      32  8        32  8      1024  8 i   65536 16w 
024:  0   17   1  2   8  1      32  8        32  8      1024  8 i   65536 16w 
025:  0   19   1  2   9  1      32  8        32  8      1024  8 i   65536 16w 
026:  0   21   1  2  10  1      32  8        32  8      1024  8 i   65536 16w 
027:  0   23   1  2  11  1      32  8        32  8      1024  8 i   65536 16w 
028:  0   25   1  3  12  1      32  8        32  8      1024  8 i   65536 16w 
029:  0   27   1  3  13  1      32  8        32  8      1024  8 i   65536 16w 
030:  0   29   1  3  14  1      32  8        32  8      1024  8 i   65536 16w 
031:  0   31   1  3  15  1      32  8        32  8      1024  8 i   65536 16w 

CPU Freq(MHz) VID  Min     Vcore   Max
000   13.13    87  0.8375  1.0063  1.0063
001   97.92    88  0.8375  1.0000  1.0000
002   96.38    88  0.8375  1.0000  1.0000
003   31.14   104  0.8375  0.9000  1.0063
004   53.12    87  0.8375  1.0063  1.0063
005   13.44    88  0.8375  1.0000  1.0000
006   82.41    87  0.8375  1.0063  1.0063
007   11.41    88  0.8375  1.0000  1.0000
008   11.45    96  0.8375  0.9500  0.9500
009   15.97    96  0.8375  0.9500  0.9500
010    0.86    97  0.8375  0.9437  0.9437
011    2.31    95  0.8375  0.9563  0.9563
012    1.55    96  0.8375  0.9500  0.9500
013    9.55    96  0.8375  0.9500  0.9500
014    2.66    96  0.8375  0.9500  0.9500
015    0.97    95  0.8375  0.9563  0.9563
016   10.21    87  0.8375  1.0063  1.0063
017   13.43    88  0.8375  1.0000  1.0000
018    8.60    88  0.8375  1.0000  1.0000
019   94.96   104  0.8375  0.9000  1.0063
020   58.43    87  0.8375  1.0063  1.0063
021   64.34    88  0.8375  1.0000  1.0000
022   44.05    87  0.8375  1.0063  1.0063
023   11.98    88  0.8375  1.0000  1.0000
024    2.87    96  0.8375  0.9500  0.9500
025    1.25    96  0.8375  0.9500  0.9500
026   18.19    97  0.8375  0.9437  0.9437
027    6.98    95  0.8375  0.9563  0.9563
028    3.15    96  0.8375  0.9500  0.9500
029    1.26    96  0.8375  0.9500  0.9500
030    5.36    96  0.8375  0.9500  0.9688
031    5.64    95  0.8375  0.9563  0.9688


CPU Freq(MHz)    Accumulator      Min  Energy(J) Max    Min  Power(W)  Max
000   30.16  000000000000013326    0.04   0.20   0.51    0.04   0.20   0.51
001   58.51  000000000000013188    0.02   0.20   0.38    0.02   0.20   0.38
002   57.28  000000000000010012    0.03   0.15   0.34    0.03   0.15   0.34
003   66.21  000000000000014928    0.03   0.23   0.35    0.03   0.23   0.35
004   63.33  000000000000014828    0.03   0.23   0.39    0.03   0.23   0.39
005    5.23  000000000000017052    0.03   0.26   0.34    0.03   0.26   0.34
006    3.61  000000000000015548    0.05   0.24   0.45    0.05   0.24   0.45
007   58.90  000000000000012854    0.06   0.20   0.31    0.06   0.20   0.31
008    6.64  000000000000003779    0.01   0.06   0.27    0.01   0.06   0.27
009   18.25  000000000000004101    0.02   0.06   0.13    0.02   0.06   0.13
010    1.71  000000000000001902    0.01   0.03   0.14    0.01   0.03   0.14
011    1.99  000000000000002361    0.01   0.04   0.25    0.01   0.04   0.25
012    1.93  000000000000001587    0.01   0.02   0.09    0.01   0.02   0.09
013    2.90  000000000000001461    0.01   0.02   0.15    0.01   0.02   0.15
014    1.50  000000000000000841    0.00   0.01   0.11    0.00   0.01   0.11
015   10.06  000000000000002906    0.01   0.04   0.11    0.01   0.04   0.11
016   28.71  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
017   28.98  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
018   42.89  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
019   78.62  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
020   50.60  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
021  229.31  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
022   92.13  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
023   57.28  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
024    4.48  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
025    1.00  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
026    2.89  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
027    4.70  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
028    2.80  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
029    0.44  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
030    3.69  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00
031    4.81  000000000000000000    0.00   0.00   0.00    0.00   0.00   0.00

Energy(J)  Package[0]         Cores               Uncore              Memory
  34.81 36.65 39.21    0.74  1.99  3.53    0.00  0.00  0.00    0.00  0.00  0.00
Power(W)
  34.81 36.65 39.21    0.74  1.99  3.53    0.00  0.00  0.00    0.00  0.00  0.00


CPU Freq(MHz) Ratio  Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)  Min TMP:TS  Max
000  173.05 ( 1.73)   3.85   4.42  95.58   0.00   0.00   0.00  0  /  0:0  /  0
001  105.71 ( 1.06)   2.35   2.46  97.54   0.00   0.00   0.00  0  /  0:0  /  0
002   57.62 ( 0.58)   1.28   1.50  98.50   0.00   0.00   0.00  0  /  0:0  /  0
003   69.95 ( 0.70)   1.55   1.91  98.09   0.00   0.00   0.00  0  /  0:0  /  0
004   15.82 ( 0.16)   0.35   0.54  99.46   0.00   0.00   0.00  0  /  0:0  /  0
005   85.18 ( 0.85)   1.89   1.92  98.08   0.00   0.00   0.00  0  /  0:0  /  0
006   28.25 ( 0.28)   0.63   0.70  99.30   0.00   0.00   0.00  0  /  0:0  /  0
007   69.44 ( 0.69)   1.54   1.72  98.28   0.00   0.00   0.00  0  /  0:0  /  0
008   27.65 ( 0.28)   0.61   0.81  99.19   0.00   0.00   0.00  0  /  0:0  /  0
009   17.55 ( 0.18)   0.39   0.60  99.40   0.00   0.00   0.00  0  /  0:0  /  0
010    2.34 ( 0.02)   0.05   0.08  99.92   0.00   0.00   0.00  0  /  0:0  /  0
011    4.33 ( 0.04)   0.10   0.15  99.85   0.00   0.00   0.00  0  /  0:0  /  0
012   61.18 ( 0.61)   1.36   1.18  98.82   0.00   0.00   0.00  0  /  0:0  /  0
013    3.71 ( 0.04)   0.08   0.13  99.87   0.00   0.00   0.00  0  /  0:0  /  0
014   72.58 ( 0.73)   1.61   1.53  98.47   0.00   0.00   0.00  0  /  0:0  /  0
015    9.73 ( 0.10)   0.22   0.32  99.68   0.00   0.00   0.00  0  /  0:0  /  0
016   17.60 ( 0.18)   0.39   0.60  99.40   0.00   0.00   0.00  0  /  0:0  /  0
017  112.77 ( 1.13)   2.51   2.35  97.65   0.00   0.00   0.00  0  /  0:0  /  0
018   23.39 ( 0.23)   0.52   0.79  99.21   0.00   0.00   0.00  0  /  0:0  /  0
019   15.73 ( 0.16)   0.35   0.52  99.48   0.00   0.00   0.00  0  /  0:0  /  0
020   57.37 ( 0.57)   1.27   1.94  98.06   0.00   0.00   0.00  0  /  0:0  /  0
021   43.05 ( 0.43)   0.96   1.26  98.74   0.00   0.00   0.00  0  /  0:0  /  0
022  229.03 ( 2.29)   5.09   7.05  92.95   0.00   0.00   0.00  0  /  0:0  /  0
023   69.40 ( 0.69)   1.54   2.24  97.76   0.00   0.00   0.00  0  /  0:0  /  0
024    5.39 ( 0.05)   0.12   0.18  99.82   0.00   0.00   0.00  0  /  0:0  /  0
025   12.59 ( 0.13)   0.28   0.42  99.58   0.00   0.00   0.00  0  /  0:0  /  0
026    7.88 ( 0.08)   0.18   0.27  99.73   0.00   0.00   0.00  0  /  0:0  /  0
027    3.68 ( 0.04)   0.08   0.13  99.87   0.00   0.00   0.00  0  /  0:0  /  0
028    6.12 ( 0.06)   0.14   0.20  99.80   0.00   0.00   0.00  0  /  0:0  /  0
029    0.95 ( 0.01)   0.02   0.03  99.97   0.00   0.00   0.00  0  /  0:0  /  0
030    3.75 ( 0.04)   0.08   0.13  99.87   0.00   0.00   0.00  0  /  0:0  /  0
031    6.37 ( 0.06)   0.14   0.21  99.79   0.00   0.00   0.00  0  /  0:0  /  0

    Averages:        Turbo  C0(%)  C1(%)  C3(%)  C6(%)  C7(%)    TjMax:    Pkg:
                      0.99   1.20  98.80   0.00   0.00   0.00       0 C     0 C


CPU     IPS            IPC            CPI
000     0.025084/s     0.643475/c     1.554062/i
001     0.018048/s     0.542125/c     1.844595/i
002     0.016224/s     0.523154/c     1.911483/i
003     0.024907/s     0.622159/c     1.607306/i
004     0.008753/s     0.333212/c     3.001094/i
005     0.003932/s     0.626759/c     1.595509/i
006     0.005692/s     0.678785/c     1.473220/i
007     0.002294/s     0.504436/c     1.982413/i
008     0.000208/s     0.230722/c     4.334223/i
009     0.005769/s     1.072930/c     0.932027/i
010     0.000046/s     0.151272/c     6.610589/i
011     0.000078/s     0.158671/c     6.302363/i
012     0.000082/s     0.151932/c     6.581878/i
013     0.000074/s     0.143778/c     6.955146/i
014     0.000073/s     0.141404/c     7.071919/i
015     0.000402/s     0.211346/c     4.731570/i
016     0.001683/s     0.437047/c     2.288086/i
017     0.002933/s     0.703867/c     1.420724/i
018     0.000063/s     0.186133/c     5.372494/i
019     0.002832/s     0.400949/c     2.494082/i
020     0.001975/s     0.224822/c     4.447955/i
021     0.002012/s     0.205581/c     4.864268/i
022     0.000736/s     0.123750/c     8.080785/i
023     0.018437/s     0.898369/c     1.113128/i
024     0.000270/s     0.220510/c     4.534947/i
025     0.000408/s     0.324812/c     3.078707/i
026     0.000136/s     0.212756/c     4.700230/i
027     0.000377/s     0.260364/c     3.840772/i
028     0.000122/s     0.162415/c     6.157073/i
029     0.000042/s     0.161605/c     6.187937/i
030     0.005526/s     0.870089/c     1.149308/i
031     0.001448/s     0.600544/c     1.665157/i


[ 0] American Megatrends International, LLC.                                    
[ 1] 1.11                                                                       
[ 2] 10/11/2022                                                                 
[ 3] Micro-Star International Co., Ltd.                                         
[ 4] MS-7E10                                                                    
[ 5] 1.0                                                                        
[ 6] T---e---l--- ---O---M-                                                     
[ 7] To be filled by O.E.M.                                                     
[ 8] To be filled by O.E.M.                                                     
[ 9] Micro-Star International Co., Ltd.                                         
[10] MPG B650 EDGE WIFI (MS-7E10)                                               
[11] 1.0                                                                        
[12] 0---0---M---0---0-                                                         
[13] Number Of Devices:4\Maximum Capacity:134217728 bytes                       
[14]                                                                            
[15] DIMM 1\P0 CHANNEL A                                                        
[16]                                                                            
[17] DIMM 1\P0 CHANNEL B                                                        
[18]                                                                            
[19] Unknown                                                                    
[20]                                                                            
[21] Unknown                                                                    
[22]                                                                            
[23] F5-6000J3238F16G                                                           
[24]                                                                            
[25] F5-6000J3238F16G                                                           

Linux:                                                                          
|- Release                                                       [6.0.10-gentoo]
|- Version                 [#4 SMP PREEMPT_DYNAMIC Mon Nov 28 19:29:53 CET 2022]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         32604388 KB
|- Shared RAM                                                          195288 KB
|- Free RAM                                                          27639044 KB
|- Buffer RAM                                                          256248 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [    acpi-cpufreq]
Governor                                                      [        ondemand]
CPU-Idle driver                                               [       acpi_idle]
|- Idle Limit                                                 [              C3]
   |- State        POLL      C1      C2      C3                                 
   |-           CPUIDLE ACPI FF ACPI IO ACPI IO                                 
   |- Power          -1       0       0       0                                 
   |- Latency         0       1      18     350                                 
   |- Residency       0       2      36     700                                 

                              Zen UMC  [14E0]                              
Controller #0                                                Dual Channel  
 Bus Rate   933 MHz       Bus Speed  933 MHz           DDR5 Speed 1399 MT/s
                                                                           
 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   32   38   38   38   32   48    4    4   20    4   16   48    4    6 
  #1   32   38   38   38   32   48    4    4   20    4   16   48    4    6 
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   30   12   16    2    1   11    7    1    7    8    0    0    0    0 
  #1   30   12   16    2    1   11    7    1    7    8    0    0    0    0 
      REFI RFC1 RFC2 RFC4 RCPB RPPB  BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 12076  312    0    3   0    0    ON OFF  R0W0   0    0   2T    ON   0 
  #1 12076  312    0    3   0    0    ON OFF  R0W0   0    0   2T    ON   0 
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   44  32    44  32    24    7 0:F:0   20   6   18   36  945   24    0 
  #1   44  32    44  32    24    7 0:F:0   20   6   18   36  945   24    0 
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    1     32768      1024           4096    F5-6000J3238F16G
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    1     32768      1024           4096    F5-6000J3238F16G

@cyring
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Owner Author

cyring commented Dec 2, 2022

Need a 7000 owner to test this version:

CoreFreq_develop.tar.gz

Buid,run, and post the output of corefreq-cli -s -n -C 1 -n -M

@cyring
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Owner Author

cyring commented Dec 4, 2022

Getting the MEMCLK may be decoded from other encoding since Zen4

{ /* SMU addresses = 0x{0,1,2,3,4,5,6,7}50{200,300,400,500} */

For example, Zen2 case

zencli smu 0x50200
[0x00050200] READ(smu) = 0x00001937 (6455)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001 1001 0011 0111

Using zencli need someone to read SMU at address 0x50200 with Zen4, like Ryzen 7000

@cyring
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Owner Author

cyring commented Dec 9, 2022

Voltage Core issue

  • Idle
    nh8uxBW - Imgur

  • Load
    ekTuaaq - Imgur

  • Based on the work made for Rembrandt, apply to Zen4 the following formula:

$$Vcore = 0.00625 \times VID$$
  • Testings should provide the following results:

    Case VID Vcore (V)
    Idle 99 0.6187
    Load 210 1.3125

EDIT: Incoming tests

  • Idle
    7950X - Idle

  • Load
    7950X - Load

@Jon0
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Jon0 commented Dec 17, 2022

7950x :

# zencli smu 0x50200
[0x00050200] READ(smu) = 0x80050bb8 (2147814328)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 1000 0000 0000 0101 0000 1011 1011 1000
Processor                                  [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture                                                   [Zen4/Raphael]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a601203]
|- Signature                                                           [  AF_61]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 32/ 32]
|- Base Clock                                                          [ 99.999]
|- Frequency            (MHz)                      Ratio                        
                 Min   2999.99                    <  30 >                       
                 Max   4499.98                    <  45 >                       
|- Factory                                                             [100.000]
                       4500                       [  45 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   4499.98                    <  45 >                       
|- Turbo Boost                                                         [ UNLOCK]
                 XFR   5799.97                    [  58 ]                       
                 CPB   5699.97                    [  57 ]                       
                  1C   2999.99                    <  30 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1799.99                    [  18 ]                       
                 MEM   5599.98                    [  56 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [Capable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
Security Features                                                               
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   <OFF>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6, 16 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Continuous Performance Control                               _CPC       [OFF]
|- Collaborative Processor Performance Control                  CPPC       <OFF>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #1       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #2       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #3       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #4       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #5       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #6       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #7       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #8       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #9       0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #10      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #11      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #12      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #13      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #14      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #15      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #16      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #17      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #18      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #19      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #20      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #21      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #22      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #23      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #24      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #25      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #26      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #27      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #28      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #29      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #30      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
   |- CPU #31      0.00 (  0)     0.00 (  0)     0.00 (  0)     0.00 (  0)      
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49:  0 C]
|- CPPC Energy Preference                                        EPP   [Capable]
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000   11.02   239  1.4938   47  000000000000012119    0.184921265   0.184921265
001  287.13   239  1.4938   47  000000000000110229    1.681961060   1.681961060
002    3.08   239  1.4938   47  000000000000006595    0.100631714   0.100631714
003   40.40   239  1.4938   47  000000000000083132    1.268493652   1.268493652
004    0.78   239  1.4938   47  000000000000004992    0.076171875   0.076171875
005    1.38   239  1.4938   47  000000000000004574    0.069793701   0.069793701
006    1.45   239  1.4938   47  000000000000107116    1.634460449   1.634460449
007   12.99   239  1.4938   47  000000000000006918    0.105560303   0.105560303
008    1.01   239  1.4938   46  000000000000029665    0.452651978   0.452651978
009   17.72   239  1.4938   46  000000000000007425    0.113296509   0.113296509
010    1.52   239  1.4938   46  000000000000003162    0.048248291   0.048248291
011    9.84   239  1.4938   46  000000000000008166    0.124603271   0.124603271
012    4.68   239  1.4938   46  000000000000004691    0.071578979   0.071578979
013    0.85   239  1.4938   46  000000000000003146    0.048004150   0.048004150
014    0.91   239  1.4938   46  000000000000003140    0.047912598   0.047912598
015    1.39   239  1.4938   46  000000000000003064    0.046752930   0.046752930
016   19.80   230  1.4375   47  000000000000000000    0.000000000   0.000000000
017    9.25   230  1.4375   47  000000000000000000    0.000000000   0.000000000
018    6.77   230  1.4375   47  000000000000000000    0.000000000   0.000000000
019   36.05   230  1.4375   47  000000000000000000    0.000000000   0.000000000
020    3.03   230  1.4375   47  000000000000000000    0.000000000   0.000000000
021    0.62   230  1.4375   47  000000000000000000    0.000000000   0.000000000
022  315.69   230  1.4375   47  000000000000000000    0.000000000   0.000000000
023    1.43   230  1.4375   47  000000000000000000    0.000000000   0.000000000
024  178.11   230  1.4375   46  000000000000000000    0.000000000   0.000000000
025    1.20   230  1.4375   46  000000000000000000    0.000000000   0.000000000
026    0.53   230  1.4375   46  000000000000000000    0.000000000   0.000000000
027   11.93   230  1.4375   46  000000000000000000    0.000000000   0.000000000
028    2.72   230  1.4375   46  000000000000000000    0.000000000   0.000000000
029    0.75   230  1.4375   46  000000000000000000    0.000000000   0.000000000
030    0.88   230  1.4375   46  000000000000000000    0.000000000   0.000000000
031    0.85   230  1.4375   46  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):  57.696487427   3.406738281   0.000000000   0.000000000   0.000000000
Power(W) :  57.696487427   3.406738281   0.000000000   0.000000000   0.000000000


                              Zen UMC  [14E0]                              
Controller #0                                                Dual Channel  
 Bus Rate  1866 MHz       Bus Speed 1867 MHz           DDR5 Speed 2800 MT/s
                                                                           
 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   40   40   40   40   77  146    8   15   32    8   30   90    8   23 
  #1   40   40   40   40   77  146    8   15   32    8   30   90    8   23 
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   38   23   21    8    1   15   15    1    8    8    0    0    0    0 
  #1   38   23   22    8    1   15   15    1    8    8    0    0    0    0 
      REFI RFC1 RFC2 RFC4 RCPB RPPB  BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 11677  312    0    3   0    0    ON OFF  R0W0   0    0   0T    ON   0 
  #1 11677  312    0    3   0    0    ON OFF  R0W0   0    0   0T    ON   0 
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   42  32    42  32    24    7 0:F:0   28   6   26   36  914   23   15 
  #1   42  32    42  32    24    7 0:F:0   28   6   26   36  914   23   15 
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    1     32768      1024           4096  CMK32GX5M2B6000C40
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    16    1     32768      1024           4096  CMK32GX5M2B6000C40

Is it possible to find the DIMM temperatures somewhere?

@cyring
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cyring commented Dec 17, 2022

@Jon0 Thank you very much, I'm processing your data.

Is it possible to find the DIMM temperatures somewhere?

It's not implemented in CoreFreq.
SuperIO appear to be the most straightforward to get them. But the number of Chips is huge, it's like rewriting hwmon lm_sensors
Although you may have noticed that CoreFreq can retrieved the joule/watt energy of Memory, because of the RAPL uniformed interface available on some Intel processor architectures. But no such nice interface for DIMM interface.
I'm remembered reading in Intel's datasheets, especially Xeon(s), some PCI space registers with DIMM Thermal data. Zen PPR specs list some Thermal SMU registers which are limited to privileged level, not even within Kernel I can access to them. Probably BIOS, SMI, and such rings

@cyring
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cyring commented Dec 17, 2022

7950x :

# zencli smu 0x50200
[0x00050200] READ(smu) = 0x80050bb8 (2147814328)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 1000 0000 0000 0101 0000 1011 1011 1000

Thanks to your dump, I'm attempting to better compute Memory Clocks.
Can you please try the followings ?

  1. pull the develop branch

  2. Build with PMC counters

make ARCH_PMC=UMC clean all
  1. start Driver, Daemon and Client in Package view
corefreq-cli -t package

You may or not get the CHA frequencies

  • Zen2 DDR4 case
    2022-12-17-143704_644x704_scrot

  • Zen3+ DDR5 case
    2022-12-17-143534_644x424_scrot

  1. Show the Uncore section from Processor window
  • MEM is the raw hardware value of Mem Clock
  • CLK is the computed Data Fabric clock

2022-12-17-144115_644x424_scrot

  1. Show the Memory Controller window where Bus Rate, Bus Speed and DDR5 Speed have been fixed

2022-12-17-144204_644x424_scrot

Thank you!

@Jon0
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Jon0 commented Dec 17, 2022

I had some issues with the develop branch when starting the daemon - compile works and insmod reported success:

sudo corefreqd
Driver connection error code 11
/dev/corefreqk: 'Resource temporarily unavailable' @ line 8791
sudo dmesg | grep CoreFreq
[   96.571073] CoreFreq: PCI_HSMP_Mailbox(1) Timeout
[   96.700603] CoreFreq(9:25:-1): Processor [ AF_61] Architecture [Zen4/Raphael] SMT [32/32]

Tested with stock arch kernel:

uname -a
Linux sapphire 6.0.12-arch1-1 #1 SMP PREEMPT_DYNAMIC Thu, 08 Dec 2022 11:03:38 +0000 x86_64 GNU/Linux

Also note master does the same thing when I build with ARCH_PMC=UMC

@cyring
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cyring commented Dec 18, 2022

I had some issues with the develop branch when starting the daemon - compile works and insmod reported success:

sudo corefreqd
Driver connection error code 11
/dev/corefreqk: 'Resource temporarily unavailable' @ line 8791
sudo dmesg | grep CoreFreq
[   96.571073] CoreFreq: PCI_HSMP_Mailbox(1) Timeout
[   96.700603] CoreFreq(9:25:-1): Processor [ AF_61] Architecture [Zen4/Raphael] SMT [32/32]

Tested with stock arch kernel:

uname -a
Linux sapphire 6.0.12-arch1-1 #1 SMP PREEMPT_DYNAMIC Thu, 08 Dec 2022 11:03:38 +0000 x86_64 GNU/Linux

Also note master does the same thing when I build with ARCH_PMC=UMC

Is this something you didn't have in your previous runs using the master branch ?

Do you have another driver which could also make use of HSMP through the SMU, and thus a resource conflict ? Can be a kernel change, patch, and so on.


PS: I'm back with the stock arch kernel [6.0.12-arch1-1] and I can't reproduce the issue.

So I will suggest you remove the HSMP capability for 7950X, changing this block as below.
Then rebuild all, and run again.

static PROCESSOR_SPECIFIC AMD_Zen4_RPL_Specific[] = {

	{
	.Brand = ZLIST("AMD Ryzen 9 7950X"),
	.Boost = {+12, +1},
	.Param.Offset = {0, 0, 0},
	.CodeNameIdx = CN_RAPHAEL,
	.TgtRatioUnlocked = 1,
	.ClkRatioUnlocked = 0b10,
	.TurboUnlocked = 1,
	.UncoreUnlocked = 0,
	.HSMP_Capable = 0,
	.Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK\
		|LATCH_HSMP_CAPABLE
	},

@Jon0
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Jon0 commented Dec 18, 2022

I found the issue was I ran corefreqd which was installed on my system via AUR, and not ./corefreqd the one I just built...

Here is the screenshots:
image
image
image

@cyring
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cyring commented Dec 18, 2022

image

5599 MT/s does it match your current DRAM speed?
2800 for Data Fabric. Is this also matching with the BIOS ?

@Jon0
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Jon0 commented Dec 19, 2022

Frequency is not quite right, I tested a few settings in bios:

Actual Bios Setting -> CoreFreq Display Freq
6000 -> 5600 (screenshot)
5600 -> 4800
5200 -> 4000

Don't see Data Fabric in bios unless its hidden somewhere...

@cyring
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cyring commented Dec 19, 2022

Frequency is not quite right, I tested a few settings in bios:

Actual Bios Setting -> CoreFreq Display Freq 6000 -> 5600 (screenshot) 5600 -> 4800 5200 -> 4000

Don't see Data Fabric in bios unless its hidden somewhere...

Do CPU-Z, HWINFO, or OCCT reports the Mem Clock as left in BIOS : screenshots please ?

@cyring
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cyring commented Dec 19, 2022

@Jon0
OK, going back to this dump

# zencli smu 0x50200
[0x00050200] READ(smu) = 0x80050bb8 (2147814328)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 1000 0000 0000 0101 0000 1011 1011 1000

The first 16 bits of hexadecimal value 0xbb8 is the frequency in MHz
3000 MHz when converted in decimal, multiplied by 2 equals the DRAM speed 6000 MT/s

This is the major change with Zen versions 1, 2, and 3 where DDR4 is encoded as a frequency ratio of 2 digits within bits [6-0]
But why that 2 digits encoding is working with Rembrandt Zen version 3 Plus which comes with DDR5 !

@cyring
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cyring commented Dec 19, 2022

  • Zen3+ Rembrandt
# ./zencli smu 0x50200
[0x00050200] READ(smu) = 0x40010960 (1073809760)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0100 0000 0000 0001 0000 1001 0110 0000

Mistake is mine: 0x960 converts to 2400 MHz

So we can use the same algorithm when DRAM is unconditionally of DDR5 kind.

@Jon0
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Jon0 commented Dec 19, 2022

Yep heres another when I set 2000M/T in bios (lowest it can go)

zencli smu 0x50200
[0x00050200] READ(smu) = 0x000503e8 (328680)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0101 0000 0011 1110 1000

I don't have a windows install available right now to check other software, but the above formula does look correct

@cyring
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cyring commented Dec 19, 2022

Yep heres another when I set 2000M/T in bios (lowest it can go)

zencli smu 0x50200
[0x00050200] READ(smu) = 0x000503e8 (328680)
   60   56   52   48   44   40   36   32   28   24   20   16   12   08   04   00
 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0101 0000 0011 1110 1000

I don't have a windows install available right now to check other software, but the above formula does look correct

Thanks,

You can now pull and try the latest code of develop branch

The impacted items are the followings

in "Processor" window:

  • Uncore CLK frequency ratio
  • Uncore MEM frequency ratio

in "Package cycles" view

  • MCLK (Hertz)

in "Memory Controller" window

  • Bus Rate
  • Bus Speed
  • DDR5 Speed
  • tRFC1 , tRFC2 and tRFC4
  • CMD ( Command Rate )
  • GDM ( Gear Down Mode )

For your information, my Zen3+ decoded results

I have searched some 7900X BIOS screenshots and found that FCLK = MCLK / 3

@KeithMyers
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KeithMyers commented Dec 20, 2022

 corefreq-cli -s -n -C 1 -n -M
Processor                                  [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture                                                   [Zen4/Raphael]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a601203]
|- Signature                                                           [  AF_61]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 32/ 32]
|- Base Clock                                                          [100.005]
|- Frequency            (MHz)                      Ratio                        
                 Min   3000.15                    <  30 >                       
                 Max   4500.23                    <  45 >                       
|- Factory                                                             [100.000]
                       4500                       [  45 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   4500.23                    <  45 >                       
   |- CPPC                                                                      
                 Min   3700.19                    <  37 >                       
                 Max   1900.10                    <  19 >                       
                 TGT   3700.19                    <  37 >                       
|- Turbo Boost                                                         [ UNLOCK]
                 XFR   5800.29                    [  58 ]                       
                 CPB   5700.29                    [  57 ]                       
                  1C   3000.15                    <  30 >                       
|- Uncore                                                              [   LOCK]
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [Capable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
Security Features                                                               
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   <OFF>
|- Virtualization                                                    SVM   [OFF]
   |- I/O MMU                                                      AMD-V   [OFF]
   |- Version                                                     [         N/A]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6, 16 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Continuous Performance Control                               _CPC       [OFF]
|- Collaborative Processor Performance Control                  CPPC       < ON>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0     300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4600.23 ( 46)      
   |- CPU #1     300.01 (  3)  1900.08 ( 19)  2800.12 ( 28)  5300.22 ( 53)      
   |- CPU #2     300.01 (  3)  1900.08 ( 19)  2800.12 ( 28)  4800.20 ( 48)      
   |- CPU #3     300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  5200.26 ( 52)      
   |- CPU #4     300.02 (  3)  1900.11 ( 19)  2800.17 ( 28)  4700.28 ( 47)      
   |- CPU #5     300.01 (  3)  1900.08 ( 19)  2800.12 ( 28)  5100.21 ( 51)      
   |- CPU #6     300.01 (  3)  1900.08 ( 19)  2800.12 ( 28)  4900.20 ( 49)      
   |- CPU #7     300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  5300.27 ( 53)      
   |- CPU #8     300.01 (  3)  1900.09 ( 19)  2800.14 ( 28)  3700.18 ( 37)      
   |- CPU #9     300.01 (  3)  1900.08 ( 19)  2800.11 ( 28)  4300.18 ( 43)      
   |- CPU #10    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4000.20 ( 40)      
   |- CPU #11    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4200.21 ( 42)      
   |- CPU #12    300.01 (  3)  1900.08 ( 19)  2800.11 ( 28)  3900.16 ( 39)      
   |- CPU #13    300.01 (  3)  1900.08 ( 19)  2800.11 ( 28)  4500.18 ( 45)      
   |- CPU #14    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  3800.19 ( 38)      
   |- CPU #15    300.01 (  3)  1900.08 ( 19)  2800.11 ( 28)  4400.18 ( 44)      
   |- CPU #16    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4600.23 ( 46)      
   |- CPU #17    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  5300.27 ( 53)      
   |- CPU #18    300.01 (  3)  1900.08 ( 19)  2800.12 ( 28)  4800.20 ( 48)      
   |- CPU #19    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  5200.26 ( 52)      
   |- CPU #20    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4700.24 ( 47)      
   |- CPU #21    300.01 (  3)  1900.09 ( 19)  2800.14 ( 28)  5100.25 ( 51)      
   |- CPU #22    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4900.25 ( 49)      
   |- CPU #23    300.01 (  3)  1900.08 ( 19)  2800.12 ( 28)  5300.22 ( 53)      
   |- CPU #24    300.01 (  3)  1900.08 ( 19)  2800.11 ( 28)  3700.15 ( 37)      
   |- CPU #25    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4300.22 ( 43)      
   |- CPU #26    300.02 (  3)  1900.11 ( 19)  2800.17 ( 28)  4000.24 ( 40)      
   |- CPU #27    300.01 (  3)  1900.08 ( 19)  2800.12 ( 28)  4200.17 ( 42)      
   |- CPU #28    300.02 (  3)  1900.11 ( 19)  2800.17 ( 28)  3900.24 ( 39)      
   |- CPU #29    300.01 (  3)  1900.08 ( 19)  2800.11 ( 28)  4500.18 ( 45)      
   |- CPU #30    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  3800.19 ( 38)      
   |- CPU #31    300.02 (  3)  1900.10 ( 19)  2800.14 ( 28)  4400.22 ( 44)      
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49:  0 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000 3691.38   206  1.2875   91  000000000000793430   12.106781006  12.106781006
001 5400.22   206  1.2875   91  000000000000894499   13.648971558  13.648971558
002 4388.97   206  1.2875   91  000000000000889480   13.572387695  13.572387695
003 5234.78   206  1.2875   91  000000000001025309   15.644973755  15.644973755
004 4818.44   206  1.2875   91  000000000001014383   15.478256226  15.478256226
005 4281.98   206  1.2875   91  000000000000982964   14.998840332  14.998840332
006 4590.97   206  1.2875   91  000000000000960419   14.654830933  14.654830933
007 4861.11   206  1.2875   91  000000000000975095   14.878768921  14.878768921
008 2835.53   206  1.2875   82  000000000000607948    9.276550293   9.276550293
009 3420.50   201  1.2563   74  000000000000628237    9.586135864   9.586135864
010 5137.88   206  1.2875   82  000000000000686994   10.482696533  10.482696533
011 3677.52   206  1.2875   82  000000000000687033   10.483291626  10.483291626
012 5044.23   206  1.2875   82  000000000000748965   11.428298950  11.428298950
013 3835.39   206  1.2875   82  000000000000692026   10.559478760  10.559478760
014 4925.04   206  1.2875   82  000000000000689250   10.517120361  10.517120361
015 4688.24   206  1.2875   82  000000000000731564   11.162780762  11.162780762
016 4439.69   206  1.2875   91  000000000000000000    0.000000000   0.000000000
017 5400.27   206  1.2875   91  000000000000000000    0.000000000   0.000000000
018 4489.09   206  1.2875   91  000000000000000000    0.000000000   0.000000000
019 5399.89   206  1.2875   91  000000000000000000    0.000000000   0.000000000
020 5400.27   206  1.2875   91  000000000000000000    0.000000000   0.000000000
021 4393.13   206  1.2875   91  000000000000000000    0.000000000   0.000000000
022 5193.99   206  1.2875   91  000000000000000000    0.000000000   0.000000000
023 4948.42   206  1.2875   91  000000000000000000    0.000000000   0.000000000
024 4498.96   201  1.2563   74  000000000000000000    0.000000000   0.000000000
025 4483.12   206  1.2875   82  000000000000000000    0.000000000   0.000000000
026 2667.34   206  1.2875   81  000000000000000000    0.000000000   0.000000000
027 4855.26   206  1.2875   81  000000000000000000    0.000000000   0.000000000
028 4664.15   206  1.2875   81  000000000000000000    0.000000000   0.000000000
029 4921.33   206  1.2875   81  000000000000000000    0.000000000   0.000000000
030 4698.44   206  1.2875   81  000000000000000000    0.000000000   0.000000000
031 4454.73   206  1.2875   81  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J): 208.999008179 197.947296143   0.000000000   0.000000000   0.000000000
Power(W) : 208.999008179 197.947296143   0.000000000   0.000000000   0.000000000


                              Zen UMC  [14E0]                              
Controller #0 

@cyring
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Owner Author

cyring commented Dec 20, 2022

@KeithMyers

 corefreq-cli -s -n -C 1 -n -M

I don't see the Memory Controller. It's working with @Jon0, same processor, same DID of 14E0 !
Can you please pull and run from the develop branch ?
All the Ryzen 9 7950X new code is available in this branch; it will be confirmed by version 1.94.0

@KeithMyers
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KeithMyers commented Dec 20, 2022

Sure. Here you go.

  corefreq-cli -s -n -C 1 -n -M
Processor                                  [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture                                                   [Zen4/Raphael]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a601203]
|- Signature                                                           [  AF_61]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 32/ 32]
|- Base Clock                                                          [ 99.997]
|- Frequency            (MHz)                      Ratio                        
                 Min   2999.94                    <  30 >                       
                 Max   4499.92                    <  45 >                       
|- Factory                                                             [100.000]
                       4500                       [  45 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   4499.92                    <  45 >                       
   |- CPPC                                                                      
                 Min   3699.93                    <  37 >                       
                 Max   1899.96                    <  19 >                       
                 TGT   2099.96                    <  21 >                       
|- Turbo Boost                                                         [ UNLOCK]
                 XFR   5799.89                    [  58 ]                       
                 CPB   5699.89                    [  57 ]                       
                  1C   2999.94                    <  30 >                       
|- Uncore                                                              [   LOCK]
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Enable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [Capable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
Security Features                                                               
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   <OFF>
|- Virtualization                                                    SVM   [OFF]
   |- I/O MMU                                                      AMD-V   [OFF]
   |- Version                                                     [         N/A]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6, 16 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Continuous Performance Control                               _CPC       [OFF]
|- Collaborative Processor Performance Control                  CPPC       < ON>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0     299.99 (  3)  1899.96 ( 19)  2799.95 ( 28)  4599.91 ( 46)      
   |- CPU #1     300.00 (  3)  1899.98 ( 19)  2799.98 ( 28)  5299.96 ( 53)      
   |- CPU #2     299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  4799.91 ( 48)      
   |- CPU #3     299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  5199.91 ( 52)      
   |- CPU #4     299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  4699.87 ( 47)      
   |- CPU #5     300.00 (  3)  1899.98 ( 19)  2799.97 ( 28)  5099.95 ( 51)      
   |- CPU #6     299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  4899.91 ( 49)      
   |- CPU #7     299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  5299.90 ( 53)      
   |- CPU #8     299.99 (  3)  1899.96 ( 19)  2799.95 ( 28)  3699.93 ( 37)      
   |- CPU #9     299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  4299.88 ( 43)      
   |- CPU #10    299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  3999.89 ( 40)      
   |- CPU #11    299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  4199.92 ( 42)      
   |- CPU #12    299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  3899.89 ( 39)      
   |- CPU #13    300.00 (  3)  1899.97 ( 19)  2799.96 ( 28)  4499.94 ( 45)      
   |- CPU #14    300.00 (  3)  1899.97 ( 19)  2799.95 ( 28)  3799.94 ( 38)      
   |- CPU #15    299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  4399.88 ( 44)      
   |- CPU #16    299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  4599.92 ( 46)      
   |- CPU #17    299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  5299.90 ( 53)      
   |- CPU #18    300.00 (  3)  1899.98 ( 19)  2799.98 ( 28)  4799.96 ( 48)      
   |- CPU #19    300.00 (  3)  1899.97 ( 19)  2799.96 ( 28)  5199.92 ( 52)      
   |- CPU #20    299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  4699.87 ( 47)      
   |- CPU #21    299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  5099.91 ( 51)      
   |- CPU #22    299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  4899.91 ( 49)      
   |- CPU #23    299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  5299.85 ( 53)      
   |- CPU #24    300.00 (  3)  1899.98 ( 19)  2799.98 ( 28)  3699.97 ( 37)      
   |- CPU #25    300.00 (  3)  1899.97 ( 19)  2799.96 ( 28)  4299.94 ( 43)      
   |- CPU #26    299.99 (  3)  1899.95 ( 19)  2799.92 ( 28)  3999.89 ( 40)      
   |- CPU #27    300.00 (  3)  1899.98 ( 19)  2799.96 ( 28)  4199.95 ( 42)      
   |- CPU #28    299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  3899.93 ( 39)      
   |- CPU #29    299.99 (  3)  1899.97 ( 19)  2799.95 ( 28)  4499.92 ( 45)      
   |- CPU #30    300.00 (  3)  1899.98 ( 19)  2799.97 ( 28)  3799.95 ( 38)      
   |- CPU #31    300.00 (  3)  1899.98 ( 19)  2799.96 ( 28)  4399.94 ( 44)      
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49:  0 C]
|- CPPC Energy Preference                                        EPP   <      0>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000 5399.11   206  1.2875   93  000000000000918178   14.010284424  14.010284424
001 5220.56   206  1.2875   92  000000000000957523   14.610641479  14.610641479
002 5162.41   206  1.2875   92  000000000000999947   15.257980347  15.257980347
003 5332.21   206  1.2875   92  000000000000970235   14.804611206  14.804611206
004 4819.76   206  1.2875   92  000000000000962505   14.686660767  14.686660767
005 5332.03   206  1.2875   92  000000000001029904   15.715087891  15.715087891
006 5399.11   206  1.2875   93  000000000001052169   16.054824829  16.054824829
007 5259.03   206  1.2875   92  000000000000927810   14.157257080  14.157257080
008 4588.91   206  1.2875   83  000000000000773417   11.801406860  11.801406860
009 4904.72   206  1.2875   81  000000000000638982    9.750091553   9.750091553
010 2452.36   206  1.2875   81  000000000000602910    9.199676514   9.199676514
011 3652.40   206  1.2875   83  000000000000663486   10.123992920  10.123992920
012 4655.87   206  1.2875   83  000000000000691626   10.553375244  10.553375244
013 4494.26   206  1.2875   81  000000000000732537   11.177627563  11.177627563
014 4074.53   206  1.2875   81  000000000000669938   10.222442627  10.222442627
015 4358.82   206  1.2875   81  000000000000698536   10.658813477  10.658813477
016 5399.90   206  1.2875   93  000000000000000000    0.000000000   0.000000000
017 5172.89   206  1.2875   92  000000000000000000    0.000000000   0.000000000
018 5303.18   206  1.2875   92  000000000000000000    0.000000000   0.000000000
019 4808.93   206  1.2875   92  000000000000000000    0.000000000   0.000000000
020 5274.48   206  1.2875   92  000000000000000000    0.000000000   0.000000000
021 5399.90   206  1.2875   92  000000000000000000    0.000000000   0.000000000
022 5399.90   206  1.2875   93  000000000000000000    0.000000000   0.000000000
023 5399.85   206  1.2875   93  000000000000000000    0.000000000   0.000000000
024 5026.75   206  1.2875   83  000000000000000000    0.000000000   0.000000000
025 3939.37   206  1.2875   83  000000000000000000    0.000000000   0.000000000
026 4202.00   206  1.2875   81  000000000000000000    0.000000000   0.000000000
027 3716.54   206  1.2875   81  000000000000000000    0.000000000   0.000000000
028 3243.91   206  1.2875   81  000000000000000000    0.000000000   0.000000000
029 4669.26   206  1.2875   81  000000000000000000    0.000000000   0.000000000
030 3582.44   206  1.2875   81  000000000000000000    0.000000000   0.000000000
031 4033.24   206  1.2875   81  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J): 208.384918213 200.727081299   0.000000000   0.000000000   0.000000000
Power(W) : 208.384918213 200.727081299   0.000000000   0.000000000   0.000000000


                              Zen UMC  [14E0]                              
Controller #0                                                    Disabled

corefreq-cli -v
1.94.0

@KeithMyers
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So is the primary terminal view supposed to show voltage? All mine shows is 0.0 in the bottom right corner.

Screenshot from 2022-12-20 10-00-17

@cyring
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Owner Author

cyring commented Dec 20, 2022

So is the primary terminal view supposed to show voltage? All mine shows is 0.0 in the bottom right corner.

This voltage aggregation is not programmed yet for Zen4
Meanwhile you can switch to the Voltage view from menu.

About the UMC something is odd, it has been working with @Jon0
Not sure if it's a code regression but I don't find any.

@Jon0 : can you please pull latest develop branch and post the UMC ?

@cyring
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cyring commented Dec 20, 2022

@KeithMyers : can you build as below and tell if UMC is showing up ?
... then reload CoreFreq from the working directory.

make ARCH_PMC=UMC clean all

@KeithMyers
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So is the primary terminal view supposed to show voltage? All mine shows is 0.0 in the bottom right corner.

This voltage aggregation is not programmed yet for Zen4 Meanwhile you can switch to the Voltage view from menu.

About the UMC something is odd, it has been working with @Jon0 Not sure if it's a code regression but I don't find any.

@Jon0 : can you please pull latest develop branch and post the UMC ?

I guess I need to go reread the docs.

What menu?? I don't see any menu or prompts for keystrokes to pull up a menu from the cli view. I know you can use a command parameter to show voltages. But haven't figured out how to do anything in the cli terminal "top"- like view.

@KeithMyers
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KeithMyers commented Dec 20, 2022

@KeithMyers : can you build as below and tell if UMC is showing up ? ... then reload CoreFreq from the working directory.

make ARCH_PMC=UMC clean all

Maybe doesn't work because of all the build errors?

root@Pipsqueek:/home/keith/Downloads/CoreFreq-develop# make ARCH_PMC=UMC clean all
rm -f corefreqd corefreq-cli
make -j1 -C /lib/modules/5.15.0-56-generic/build M=/home/keith/Downloads/CoreFreq-develop clean
make[1]: Entering directory '/usr/src/linux-headers-5.15.0-56-generic'
  CLEAN   /home/keith/Downloads/CoreFreq-develop/Module.symvers
make[1]: Leaving directory '/usr/src/linux-headers-5.15.0-56-generic'
cc  -Wall -Wfatal-errors -pthread -c corefreqd.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
  -o corefreqd.o
cc  -Wall -Wfatal-errors -c corefreqm.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
  -o corefreqm.o
cc  -Wall -Wfatal-errors corefreqd.c corefreqm.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
  -o corefreqd -lpthread -lm -lrt
cc  -Wall -Wfatal-errors -c corefreq-cli.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC  \
  -o corefreq-cli.o
cc  -Wall -Wfatal-errors -c corefreq-ui.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
  -o corefreq-ui.o
cc  -Wall -Wfatal-errors -c corefreq-cli-rsc.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC  \
  -o corefreq-cli-rsc.o
cc  -Wall -Wfatal-errors -c corefreq-cli-json.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
  -o corefreq-cli-json.o
cc  -Wall -Wfatal-errors -c corefreq-cli-extra.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC \
  -o corefreq-cli-extra.o
cc  -Wall -Wfatal-errors \
  corefreq-cli.c corefreq-ui.c corefreq-cli-rsc.c \
  corefreq-cli-json.c corefreq-cli-extra.c \
  -D CORE_COUNT=256 -D TASK_ORDER=5 -D MAX_FREQ_HZ=6575000000 -D UBENCH=0 -D DELAY_TSC=1 -D ARCH_PMC=UMC  \
  -o corefreq-cli -lm -lrt
make -j1 -C /lib/modules/5.15.0-56-generic/build M=/home/keith/Downloads/CoreFreq-develop modules
make[1]: Entering directory '/usr/src/linux-headers-5.15.0-56-generic'
  CC [M]  /home/keith/Downloads/CoreFreq-develop/corefreqk.o
  MODPOST /home/keith/Downloads/CoreFreq-develop/Module.symvers
  CC [M]  /home/keith/Downloads/CoreFreq-develop/corefreqk.mod.o
  LD [M]  /home/keith/Downloads/CoreFreq-develop/corefreqk.ko
  BTF [M] /home/keith/Downloads/CoreFreq-develop/corefreqk.ko
Skipping BTF generation for /home/keith/Downloads/CoreFreq-develop/corefreqk.ko due to unavailability of vmlinux
make[1]: Leaving directory '/usr/src/linux-headers-5.15.0-56-generic'

@cyring
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cyring commented Dec 20, 2022

@KeithMyers

Menus are opened using function keys F2 or F3 or F4 as direct entries.


Except the Skipping BTF warning, I don't see a building error.
Build is OK if you're getting the 3 binaries corefreqk.ko, corefreqd and corefreq-cli

To avoid API mismatch, you have to uninstall any previous CoreFreq package of your distribution, if any.

Using the develop branch, makes sure to run from the build directory.
Don't build as root.

For the driver

  • no modprobe and use insmod ./corefreqk.ko

For the daemon

  • as root
    ./corefreqd

For the client

  • as a standard user
    ./corefreq-cli

In Github, use 3 anti-quotes before and after the code you're pasting.

@hchechao2
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Actually disabling SMT is what I want because I am working in an enviroment which is required to be low latency.that is why I also disable cpu-idle driver

So you think it is just problem about reading UMC sensors or memory controller not working properly.
Indeed I have encountered some wired and tough performance problem with 7950X which I suspect it is about memory controller and DMA controller (the latency of coping data from device to memory jumps to 6us even more (normally 1~2 us) ,which is too high to view it as PCIE latency) .I have changed the device driver,the motherboard, the bios and so on ,all for nothing.

@KeithMyers
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I haven't seen any indications of memory instability at stock EXPO II timings using a G.Skill 2 X 16GB kit at 6000Mhz.
24/7 distributed computing being run. Some applications are memory intensive and some applications are storage intensive.
All application run concurrently. So the entire system gets an all-around workout.

I just think the Corefreq driver just doesn't see the UMC with kernels less than 6.x

@hchechao2
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I finally found the latency problem is about iommu , absolutely need to disable it .

@cyring
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cyring commented Apr 12, 2023

I just think the Corefreq driver just doesn't see the UMC with kernels less than 6.x

Raphael UMC entry is the function AMD_DataFabric_Raphael starting at the line:

static PCI_CALLBACK AMD_DataFabric_Raphael(struct pci_dev *pdev)

Callflow is a low level access, direct to Registers, kernel can't beat with that.

You can try to dump the UMC from zencli but this user-space software still needs adaptations to support 7950X.

  1. Edit and replace code in UMC_Read
	const unsigned int CHIP_BAR[2][2] = {
	[0] =	{
		[0] = UMC_BAR[cha] + 0x0,
		[1] = UMC_BAR[cha] + 0x20
		},
	[1] =	{
		[0] = UMC_BAR[cha] + 0x10,
		[1] = UMC_BAR[cha] + 0x30
		}
	};
  1. Compile source code
cc zencli.c -o zencli
  1. Dump the UMC (as root)
./zencli umc

@KeithMyers
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KeithMyers commented Apr 12, 2023

Here is zencli with the modified code in UMC_Read at line 630.

root@Pipsqueek:/home/keith/Downloads# ./zencli umc

Data Fabric: scanning UMC @ BAR[0x00050000] : 0 1 2 3 4 5 6 7 for 2 Channels

CHA[0] CHIP[0:0] @ 0x00050000[0x00000000] Disable, Rank=0
CHA[0] MASK[0:0] @ 0x00050020[0x00000000]
CHA[0] CHIP[0:1] @ 0x00050010[0x00000000] Disable, Rank=0
CHA[0] MASK[0:1] @ 0x00050030[0x00000000]
CHA[0] CHIP[1:0] @ 0x00050004[0x00000000] Disable, Rank=0
CHA[0] MASK[1:0] @ 0x00050020[0x00000000]
CHA[0] CHIP[1:1] @ 0x00050014[0x00000000] Disable, Rank=0
CHA[0] MASK[1:1] @ 0x00050030[0x00000000]
CHA[0] CHIP[2:0] @ 0x00050008[0x00000001] Enable, Rank=0
CHA[0] MASK[2:0] @ 0x00050024[0x00000000] ChipSize[0]
CHA[0] CHIP[2:1] @ 0x00050018[0x00000000] Disable, Rank=0
CHA[0] MASK[2:1] @ 0x00050034[0x00000000]
CHA[0] CHIP[3:0] @ 0x00050008[0x00000001] Enable, Rank=0
CHA[0] MASK[3:0] @ 0x00050024[0x00000000] ChipSize[0]
CHA[0] CHIP[3:1] @ 0x00050018[0x00000000] Disable, Rank=0
CHA[0] MASK[3:1] @ 0x00050034[0x00000000]

DIMM Size[0 KB] [0 MB]

CHA[1] CHIP[0:0] @ 0x00150000[0x00000000] Disable, Rank=0
CHA[1] MASK[0:0] @ 0x00150020[0x00000000]
CHA[1] CHIP[0:1] @ 0x00150010[0x00000000] Disable, Rank=0
CHA[1] MASK[0:1] @ 0x00150030[0x00000000]
CHA[1] CHIP[1:0] @ 0x00150004[0x00000000] Disable, Rank=0
CHA[1] MASK[1:0] @ 0x00150020[0x00000000]
CHA[1] CHIP[1:1] @ 0x00150014[0x00000000] Disable, Rank=0
CHA[1] MASK[1:1] @ 0x00150030[0x00000000]
CHA[1] CHIP[2:0] @ 0x00150008[0x00000001] Enable, Rank=0
CHA[1] MASK[2:0] @ 0x00150024[0x00000000] ChipSize[0]
CHA[1] CHIP[2:1] @ 0x00150018[0x00000000] Disable, Rank=0
CHA[1] MASK[2:1] @ 0x00150034[0x00000000]
CHA[1] CHIP[3:0] @ 0x00150008[0x00000001] Enable, Rank=0
CHA[1] MASK[3:0] @ 0x00150024[0x00000000] ChipSize[0]
CHA[1] CHIP[3:1] @ 0x00150018[0x00000000] Disable, Rank=0
CHA[1] MASK[3:1] @ 0x00150034[0x00000000]

DIMM Size[0 KB] [0 MB]

@cyring
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cyring commented Apr 12, 2023

Here is zencli with the modified code

Thank you.

If it was run with kernel 5, is it now possible to run it with kernel 6 ?

@KeithMyers
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I'd have to load one of the 6.x kernels again. Hit and miss finding a kernel with Nvidia driver support.

Just a FYI. I also ran with the unmodified zencli and the original mask at 0x28 has more output. Still doesn't find any DIMMS though with kernel 5.

@KeithMyers
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KeithMyers commented Apr 12, 2023

Here is the modified zencli output on kernel 6.3.0-rc6

root@Pipsqueek:/home/keith/Downloads# ./zencli umc

Data Fabric: scanning UMC @ BAR[0x00050000] : 0 1 2 3 4 5 6 7 for 2 Channels

CHA[0] CHIP[0:0] @ 0x00050000[0x00000000] Disable, Rank=0
CHA[0] MASK[0:0] @ 0x00050020[0x00000000]
CHA[0] CHIP[0:1] @ 0x00050010[0x00000000] Disable, Rank=0
CHA[0] MASK[0:1] @ 0x00050030[0x00000000]
CHA[0] CHIP[1:0] @ 0x00050004[0x00000000] Disable, Rank=0
CHA[0] MASK[1:0] @ 0x00050020[0x00000000]
CHA[0] CHIP[1:1] @ 0x00050014[0x00000000] Disable, Rank=0
CHA[0] MASK[1:1] @ 0x00050030[0x00000000]
CHA[0] CHIP[2:0] @ 0x00050008[0x00000001] Enable, Rank=0
CHA[0] MASK[2:0] @ 0x00050024[0x00000000] ChipSize[0]
CHA[0] CHIP[2:1] @ 0x00050018[0x00000000] Disable, Rank=0
CHA[0] MASK[2:1] @ 0x00050034[0x00000000]
CHA[0] CHIP[3:0] @ 0x00050008[0x00000001] Enable, Rank=0
CHA[0] MASK[3:0] @ 0x00050024[0x00000000] ChipSize[0]
CHA[0] CHIP[3:1] @ 0x00050018[0x00000000] Disable, Rank=0
CHA[0] MASK[3:1] @ 0x00050034[0x00000000]

DIMM Size[0 KB] [0 MB]

CHA[1] CHIP[0:0] @ 0x00150000[0x00000000] Disable, Rank=0
CHA[1] MASK[0:0] @ 0x00150020[0x00000000]
CHA[1] CHIP[0:1] @ 0x00150010[0x00000000] Disable, Rank=0
CHA[1] MASK[0:1] @ 0x00150030[0x00000000]
CHA[1] CHIP[1:0] @ 0x00150004[0x00000000] Disable, Rank=0
CHA[1] MASK[1:0] @ 0x00150020[0x00000000]
CHA[1] CHIP[1:1] @ 0x00150014[0x00000000] Disable, Rank=0
CHA[1] MASK[1:1] @ 0x00150030[0x00000000]
CHA[1] CHIP[2:0] @ 0x00150008[0x00000001] Enable, Rank=0
CHA[1] MASK[2:0] @ 0x00150024[0x00000000] ChipSize[0]
CHA[1] CHIP[2:1] @ 0x00150018[0x00000000] Disable, Rank=0
CHA[1] MASK[2:1] @ 0x00150034[0x00000000]
CHA[1] CHIP[3:0] @ 0x00150008[0x00000001] Enable, Rank=0
CHA[1] MASK[3:0] @ 0x00150024[0x00000000] ChipSize[0]
CHA[1] CHIP[3:1] @ 0x00150018[0x00000000] Disable, Rank=0
CHA[1] MASK[3:1] @ 0x00150034[0x00000000]

DIMM Size[0 KB] [0 MB]

@KeithMyers
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KeithMyers commented Apr 12, 2023

Here is the master built on kernel 6.3.5. Wouldn't insert the driver built on the previous make built on kernel 5.19. Said the symbols were incorrect.
corefreqk: disagrees about version of symbol module_layout

keith@Pipsqueek:~/Downloads/CoreFreq-master$ ./corefreq-cli -s -n -m -n -k -n -B -n -M
Processor                                  [AMD Ryzen 9 7950X 16-Core Processor]
|- Architecture                                                   [Zen4/Raphael]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a601203]
|- Signature                                                           [  AF_61]
|- Stepping                                                            [      2]
|- Online CPU                                                          [ 32/ 32]
|- Base Clock                                                          [ 99.999]
|- Frequency            (MHz)                      Ratio                        
                 Min   2999.98                    <  30 >                       
                 Max   4499.96                    <  45 >                       
|- Factory                                                             [100.000]
                       4500                       [  45 ]                       
|- Performance                                                                  
   |- P-State                                                                   
                 TGT   4499.96                    <  45 >                       
|- Turbo Boost                                                         [ UNLOCK]
                 XFR   5799.95                    [  58 ]                       
                 CPB   5699.95                    [  57 ]                       
                  1C   2999.98                    <  30 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1499.99                    [  15 ]                       
                 MEM   2999.98                    [  30 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                     FMA | FMA4   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Memory Protection Extensions                                  MPX   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [Capable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
Security Features                                                               
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
   |- L2 Prefetcher                                                L2 HW   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   <OFF>
|- Virtualization                                                    SVM   [OFF]
   |- I/O MMU                                                      AMD-V   [OFF]
   |- Version                                                     [         N/A]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6, 16 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- ACPI Processor C-States                                      _CST   [      3]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- Global Time Stamp Counter                                           [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      2]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [Missing]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49:  0 C]
|- CPPC Energy Preference                                        EPP   [Capable]
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  115 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID CCD CCX ID/ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0  0   0  0      32  8        32  8      1024  8 i   65536 16w 
001:  0    2   0  0   1  0      32  8        32  8      1024  8 i   65536 16w 
002:  0    4   0  0   2  0      32  8        32  8      1024  8 i   65536 16w 
003:  0    6   0  0   3  0      32  8        32  8      1024  8 i   65536 16w 
004:  0    8   0  1   4  0      32  8        32  8      1024  8 i   65536 16w 
005:  0   10   0  1   5  0      32  8        32  8      1024  8 i   65536 16w 
006:  0   12   0  1   6  0      32  8        32  8      1024  8 i   65536 16w 
007:  0   14   0  1   7  0      32  8        32  8      1024  8 i   65536 16w 
008:  0   16   1  2   8  0      32  8        32  8      1024  8 i   65536 16w 
009:  0   18   1  2   9  0      32  8        32  8      1024  8 i   65536 16w 
010:  0   20   1  2  10  0      32  8        32  8      1024  8 i   65536 16w 
011:  0   22   1  2  11  0      32  8        32  8      1024  8 i   65536 16w 
012:  0   24   1  3  12  0      32  8        32  8      1024  8 i   65536 16w 
013:  0   26   1  3  13  0      32  8        32  8      1024  8 i   65536 16w 
014:  0   28   1  3  14  0      32  8        32  8      1024  8 i   65536 16w 
015:  0   30   1  3  15  0      32  8        32  8      1024  8 i   65536 16w 
016:  0    1   0  0   0  1      32  8        32  8      1024  8 i   65536 16w 
017:  0    3   0  0   1  1      32  8        32  8      1024  8 i   65536 16w 
018:  0    5   0  0   2  1      32  8        32  8      1024  8 i   65536 16w 
019:  0    7   0  0   3  1      32  8        32  8      1024  8 i   65536 16w 
020:  0    9   0  1   4  1      32  8        32  8      1024  8 i   65536 16w 
021:  0   11   0  1   5  1      32  8        32  8      1024  8 i   65536 16w 
022:  0   13   0  1   6  1      32  8        32  8      1024  8 i   65536 16w 
023:  0   15   0  1   7  1      32  8        32  8      1024  8 i   65536 16w 
024:  0   17   1  2   8  1      32  8        32  8      1024  8 i   65536 16w 
025:  0   19   1  2   9  1      32  8        32  8      1024  8 i   65536 16w 
026:  0   21   1  2  10  1      32  8        32  8      1024  8 i   65536 16w 
027:  0   23   1  2  11  1      32  8        32  8      1024  8 i   65536 16w 
028:  0   25   1  3  12  1      32  8        32  8      1024  8 i   65536 16w 
029:  0   27   1  3  13  1      32  8        32  8      1024  8 i   65536 16w 
030:  0   29   1  3  14  1      32  8        32  8      1024  8 i   65536 16w 
031:  0   31   1  3  15  1      32  8        32  8      1024  8 i   65536 16w 

Linux:                                                                          
|- Release                                             [6.3.0-060300rc6-generic]
|- Version      [#202304091930 SMP PREEMPT_DYNAMIC Sun Apr  9 19:37:37 UTC 2023]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         32561228 KB
|- Shared RAM                                                           42808 KB
|- Free RAM                                                          28695672 KB
|- Buffer RAM                                                          106168 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [    acpi-cpufreq]
Governor                                                      [       schedutil]
CPU-Idle driver                                               [       acpi_idle]
|- Idle Limit                                                 [              C3]
   |- State        POLL      C1      C2      C3                                 
   |-           CPUIDLE ACPI FF ACPI IO ACPI IO                                 
   |- Power          -1       0       0       0                                 
   |- Latency         0       1      18     350                                 
   |- Residency       0       2      36     700                                 

[ 0] American Megatrends Inc.                                                   
[ 1] 0805                                                                       
[ 2] 11/04/2022                                                                 
[ 3] ASUS                                                                       
[ 4] System Product Name                                                        
[ 5] System Version                                                             
[ 6] S---e---e---l---m---                                                       
[ 7] SKU                                                                        
[ 8] To be filled by O.E.M.                                                     
[ 9] ASUSTeK COMPUTER INC.                                                      
[10] ROG CROSSHAIR X670E HERO                                                   
[11] Rev 1.xx                                                                   
[12] 2---0---7---4--                                                            
[13] Number Of Devices:4\Maximum Capacity:134217728 kilobytes                   
[14]                                                                            
[15] DIMM 1\P0 CHANNEL A                                                        
[16]                                                                            
[17] DIMM 1\P0 CHANNEL B                                                        
[18]                                                                            
[19] Unknown                                                                    
[20]                                                                            
[21] Unknown                                                                    
[22]                                                                            
[23] F5-6000J3636F16G                                                           
[24]                                                                            
[25] F5-6000J3636F16G                                                           

                              Zen UMC  [14E0]                              
Controller #0                                                Dual Channel  
 Bus Rate  3000 MHz       Bus Speed 2999 MHz           DDR5 Speed 5998 MT/s
                                                                           
 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   36   36   36   36   96  132    8   15   32    8   30   90    8   23 
  #1   36   36   36   36   96  132    8   15   32    8   30   90    8   23 
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   34   23   20    8    1   15   15    1    8    8    0    0    0    0 
  #1   34   23   21    8    1   15   15    1    8    8    0    0    0    0 
      REFI RFC1 RFC2 RFCsb RCPB RPPB BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 11677  312  192  390   0    0    ON OFF  R0W0   0    0   1T    ON   0 
  #1 11677  312  192  390   0    0    ON OFF  R0W0   0    0   1T    ON   0 
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   42  32    42  32    24    7 0:F:0   24   6   22   36  914   23   15 
  #1   42  32    42  32    24    7 0:F:0   24   6   22   36  914   23   15 
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    32    1     65536      1024          16384    F5-6000J3636F16G
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1    32    1     65536      1024          16384    F5-6000J3636F16G

@KeithMyers
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So somehow corefreq can't access the UMC properly on 5.x kernels, yet can on 6.x kernels

@cyring
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Owner Author

cyring commented Apr 12, 2023

I'd have to load one of the 6.x kernels again. Hit and miss finding a kernel with Nvidia driver support.

Just a FYI. I also ran with the unmodified zencli and the original mask at 0x28 has more output. Still doesn't find any DIMMS though with kernel 5.

I have to refactor UMC decoding in zencli to match the CoreFreq driver one.

@cyring
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Owner Author

cyring commented Apr 12, 2023

What's new in kernel 6 which allows the SMU to provide more bits to help decoding the UMC ?

That's what I'm looking for.

@cyring
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Owner Author

cyring commented Apr 12, 2023

With kernel 6, do you have an amd_pmc or amd_pmf module loaded ?

@KeithMyers
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KeithMyers commented Apr 12, 2023

With kernel 6, do you have an amd_pmc or amd_pmf module loaded ?

No, I don't.

keith@Pipsqueek:~$ lsmod
Module                  Size  Used by
nvidia_uvm           1605632  0
nvidia_drm             86016  11
nvidia_modeset       1253376  8 nvidia_drm
snd_hda_codec_hdmi     94208  2
intel_rapl_msr         20480  0
intel_rapl_common      40960  1 intel_rapl_msr
edac_mce_amd           40960  0
binfmt_misc            24576  1
snd_hda_intel          61440  2
snd_intel_dspcfg       36864  1 snd_hda_intel
snd_intel_sdw_acpi     20480  1 snd_intel_dspcfg
snd_hda_codec         204800  2 snd_hda_codec_hdmi,snd_hda_intel
kvm                  1347584  0
snd_hda_core          139264  3 snd_hda_codec_hdmi,snd_hda_intel,snd_hda_codec
irqbypass              16384  1 kvm
snd_hwdep              20480  1 snd_hda_codec
crct10dif_pclmul       16384  1
polyval_clmulni        16384  0
polyval_generic        16384  1 polyval_clmulni
ghash_clmulni_intel    16384  0
sha512_ssse3           53248  0
nvidia              56561664  460 nvidia_uvm,nvidia_modeset
snd_pcm               192512  4 snd_hda_codec_hdmi,snd_hda_intel,snd_hda_codec,snd_hda_core
nls_iso8859_1          16384  1
aesni_intel           397312  0
joydev                 32768  0
eeepc_wmi              16384  0
snd_seq_midi           20480  0
crypto_simd            20480  1 aesni_intel
snd_seq_midi_event     16384  1 snd_seq_midi
asus_wmi               73728  1 eeepc_wmi
cryptd                 28672  2 crypto_simd,ghash_clmulni_intel
snd_rawmidi            53248  1 snd_seq_midi
input_leds             16384  0
ledtrig_audio          16384  1 asus_wmi
rapl                   20480  0
sparse_keymap          16384  1 asus_wmi
platform_profile       16384  1 asus_wmi
snd_seq                94208  2 snd_seq_midi,snd_seq_midi_event
wmi_bmof               16384  0
snd_seq_device         16384  3 snd_seq,snd_seq_midi,snd_rawmidi
k10temp                16384  0
ccp                   131072  0
snd_timer              49152  2 snd_seq,snd_pcm
drm_kms_helper        258048  1 nvidia_drm
snd                   135168  13 snd_seq,snd_seq_device,snd_hda_codec_hdmi,snd_hwdep,snd_hda_intel,snd_hda_codec,snd_timer,snd_pcm,snd_rawmidi
syscopyarea            16384  1 drm_kms_helper
sysfillrect            20480  1 drm_kms_helper
sysimgblt              16384  1 drm_kms_helper
soundcore              16384  1 snd
ucsi_acpi              16384  0
typec_ucsi             57344  1 ucsi_acpi
typec                 106496  1 typec_ucsi
mac_hid                16384  0
sch_fq_codel           24576  5
msr                    16384  0
parport_pc             53248  0
ppdev                  24576  0
lp                     28672  0
parport                73728  3 parport_pc,lp,ppdev
ramoops                36864  0
reed_solomon           28672  1 ramoops
pstore_blk             16384  0
drm                   712704  15 drm_kms_helper,nvidia,nvidia_drm
pstore_zone            36864  1 pstore_blk
efi_pstore             16384  0
ip_tables              36864  0
x_tables               65536  1 ip_tables
autofs4                57344  2
hid_logitech_hidpp     65536  0
hid_logitech_dj        36864  0
hid_generic            16384  0
usbhid                 77824  4 hid_logitech_dj,hid_logitech_hidpp
hid                   176128  4 usbhid,hid_generic,hid_logitech_dj,hid_logitech_hidpp
nvme                   57344  2
crc32_pclmul           16384  0
nvme_core             204800  3 nvme
igc                   192512  0
ahci                   49152  2
i2c_piix4              28672  0
xhci_pci               24576  0
libahci                57344  1 ahci
xhci_pci_renesas       20480  1 xhci_pci
nvme_common            28672  1 nvme_core
video                  73728  2 asus_wmi,nvidia_modeset
wmi                    40960  3 video,asus_wmi,wmi_bmof
gpio_amdpt             20480  0

@cyring
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cyring commented Apr 12, 2023

CoreFreq is really similar to edac_mce_amd when detecting the enabled UMCs

Does it make a difference with and without edac_mce_amd ?

@KeithMyers
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I tried blacklisting that for you once or twice before and it never made a difference.

@cyring
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cyring commented Apr 13, 2023

Do you have in kernel log, something about the following base address

#define AMD_PMF_BASE_ADDR_LO		0x13B102E8
#define AMD_PMF_BASE_ADDR_HI		0x13B102EC

@KeithMyers
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Do you have in kernel log, something about the following base address

#define AMD_PMF_BASE_ADDR_LO		0x13B102E8
#define AMD_PMF_BASE_ADDR_HI		0x13B102EC

I couldn't find any elements related to ANY term in your post in my kern.logs. In fact, couldn't find any of your terms in ANY log.

@cyring
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cyring commented Apr 16, 2023

Thank you. Keeping track in Wiki 7950X

About new topology from CPUID extension, it's too early to program it in CoreFreq, data don't show something about E-core(s) yet.

@cyring cyring closed this as completed Apr 16, 2023
@amfern
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amfern commented May 12, 2023

Thank you for your amazing work.
Can't wait to view the SoC voltage in light of the recent SoC+Expo+melting CPU issue.

@cyring
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cyring commented May 12, 2023

Thank you for your amazing work. Can't wait to view the SoC voltage in light of the recent SoC+Expo+melting CPU issue.

#378 (comment) is where we started digging for voltages from known addresses.
I need volunteers to continue the research part:

  1. Scan and read addresses
  2. Compute voltage value from VID
  3. Correcting Accuracy and find Limits

@amfern
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amfern commented May 12, 2023

@cyring well how can i help with the first item "Scan and read addresses"?
I have an 7950x and i use arch linux with zen kernel.

@cyring
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cyring commented May 12, 2023

@cyring well how can i help with the first item "Scan and read addresses"? I have an 7950x and i use arch linux with zen kernel.

Thanks. Let's move to this thread where you can execute and post your dump results:
#439

@cyring
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cyring commented Mar 18, 2024

@amfern @KeithMyers @Jon0

Hello,

I have a null temperature issue among Zen4 models.
As requested in Ryzen 8600G issue #84 , using your Ryzen 7950X can you pull develop branch and edit the header file at that line:

#define SMU_AMD_THM_TCTL_CCD_REGISTER_F19H_61H \

and replace code with this one:

#define SMU_AMD_THM_TCTL_CCD_REGISTER_F19H_61H				\
	(SMU_AMD_THM_TCTL_REGISTER_F17H + 0x300)

Next rebuild, unload, reload and test for temperature of your 7950X

Thanks

@cyring cyring reopened this Mar 18, 2024
@amfern
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amfern commented Mar 18, 2024

Hello @cyring

I get constant temperature 27C with the patch.
image

But it works just fine without the patch
image

@cyring
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cyring commented Mar 18, 2024

Hello @cyring

I get constant temperature 27C with the patch.

But it works just fine without the patch

Thank you for your attempts

k10temp makes no difference and uses the same offset address of 0x300 for both Raphael and Genoa and other Zen4 by the way
EDIT: k10temp makes a difference between offset 0x308 and offset 0x300

In CoreFreq, with EPYC Genoa, the Thermal register address differs of an 8 value between Raphael and Genoa. It's odd.

@cyring
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cyring commented Mar 29, 2024

Genoa temperature function is now working.
Thank you for your returns.

@cyring cyring closed this as completed Mar 29, 2024
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