DAOS-14532 gurt: Replace environment APIs hook (#13483)

This PR is a subset of the PR #13250 allowing thread safe management of environment variables: it has been split into smaller PRs to facilitate the review process.
This PR mainly add thread safe environment variables management functions.
It also remove and replace old non thread safe custom environment management functions.
Finally, it replace the setenv() function with d_setenv().

Required-githooks: true

Signed-off-by: Cedric Koch-Hofer <cedric.koch-hofer@intel.com>

src/bio/bio_xstream.c

@@ -1,5 +1,5 @@
 /**
- * (C) Copyright 2018-2023 Intel Corporation.
+ * (C) Copyright 2018-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -196,8 +196,8 @@ set_faulty_criteria(void)
 	glb_criteria.fc_max_csum_errs = UINT32_MAX;
 
 	d_getenv_bool("DAOS_NVME_AUTO_FAULTY_ENABLED", &glb_criteria.fc_enabled);
-	d_getenv_int("DAOS_NVME_AUTO_FAULTY_IO", &glb_criteria.fc_max_io_errs);
-	d_getenv_int("DAOS_NVME_AUTO_FAULTY_CSUM", &glb_criteria.fc_max_csum_errs);
+	d_getenv_uint32_t("DAOS_NVME_AUTO_FAULTY_IO", &glb_criteria.fc_max_io_errs);
+	d_getenv_uint32_t("DAOS_NVME_AUTO_FAULTY_CSUM", &glb_criteria.fc_max_csum_errs);
 
 	D_INFO("NVMe auto faulty is %s. Criteria: max_io_errs:%u, max_csum_errs:%u\n",
 	       glb_criteria.fc_enabled ? "enabled" : "disabled",
@@ -249,15 +249,15 @@ bio_nvme_init(const char *nvme_conf, int numa_node, unsigned int mem_size,
 	d_getenv_bool("DAOS_SCM_RDMA_ENABLED", &bio_scm_rdma);
 	D_INFO("RDMA to SCM is %s\n", bio_scm_rdma ? "enabled" : "disabled");
 
-	d_getenv_int("DAOS_SPDK_SUBSYS_TIMEOUT", &bio_spdk_subsys_timeout);
+	d_getenv_uint("DAOS_SPDK_SUBSYS_TIMEOUT", &bio_spdk_subsys_timeout);
 	D_INFO("SPDK subsystem fini timeout is %u ms\n", bio_spdk_subsys_timeout);
 
-	d_getenv_int("DAOS_SPDK_MAX_UNMAP_CNT", &bio_spdk_max_unmap_cnt);
+	d_getenv_uint("DAOS_SPDK_MAX_UNMAP_CNT", &bio_spdk_max_unmap_cnt);
 	if (bio_spdk_max_unmap_cnt == 0)
 		bio_spdk_max_unmap_cnt = UINT32_MAX;
 	D_INFO("SPDK batch blob unmap call count is %u\n", bio_spdk_max_unmap_cnt);
 
-	d_getenv_int("DAOS_MAX_ASYNC_SZ", &bio_max_async_sz);
+	d_getenv_uint("DAOS_MAX_ASYNC_SZ", &bio_max_async_sz);
 	D_INFO("Max async data size is set to %u bytes\n", bio_max_async_sz);
 
 	/* Hugepages disabled */

src/cart/crt_init.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2016-2023 Intel Corporation.
+ * (C) Copyright 2016-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -191,7 +191,7 @@ prov_data_init(struct crt_prov_gdata *prov_data, crt_provider_t provider,
 
 	/* Set max number of contexts. Defaults to the number of cores */
 	ctx_num = 0;
-	d_getenv_int("CRT_CTX_NUM", &ctx_num);
+	d_getenv_uint("CRT_CTX_NUM", &ctx_num);
 	if (opt)
 		max_num_ctx = ctx_num ? ctx_num : max(crt_gdata.cg_num_cores, opt->cio_ctx_max_num);
 	else
@@ -220,7 +220,7 @@ prov_data_init(struct crt_prov_gdata *prov_data, crt_provider_t provider,
 			if (share_addr) {
 				set_sep = true;
 				ctx_num = 0;
-				d_getenv_int("CRT_CTX_NUM", &ctx_num);
+				d_getenv_uint("CRT_CTX_NUM", &ctx_num);
 				max_num_ctx = ctx_num;
 			}
 		}
@@ -277,30 +277,30 @@ static int data_init(int server, crt_init_options_t *opt)
 		crt_gdata.cg_rpcid, crt_gdata.cg_num_cores);
 
 	/* Set context post init / post incr to tune number of pre-posted recvs */
-	d_getenv_int("D_POST_INIT", &post_init);
+	d_getenv_uint32_t("D_POST_INIT", &post_init);
 	crt_gdata.cg_post_init = post_init;
-	d_getenv_int("D_POST_INCR", &post_incr);
+	d_getenv_uint32_t("D_POST_INCR", &post_incr);
 	crt_gdata.cg_post_incr = post_incr;
 
 	is_secondary = 0;
 	/* Apply CART-890 workaround for server side only */
 	if (server) {
-		d_getenv_int("CRT_ENABLE_MEM_PIN", &mem_pin_enable);
+		d_getenv_uint("CRT_ENABLE_MEM_PIN", &mem_pin_enable);
 		if (mem_pin_enable == 1)
 			mem_pin_workaround();
 	} else {
 		/*
 		 * Client-side envariable to indicate that the cluster
 		 * is running using a secondary provider
 		 */
-		d_getenv_int("CRT_SECONDARY_PROVIDER", &is_secondary);
+		d_getenv_uint("CRT_SECONDARY_PROVIDER", &is_secondary);
 	}
 	crt_gdata.cg_provider_is_primary = (is_secondary) ? 0 : 1;
 
 	if (opt && opt->cio_crt_timeout != 0)
 		timeout = opt->cio_crt_timeout;
 	else
-		d_getenv_int("CRT_TIMEOUT", &timeout);
+		d_getenv_uint("CRT_TIMEOUT", &timeout);
 
 	if (timeout == 0 || timeout > 3600)
 		crt_gdata.cg_timeout = CRT_DEFAULT_TIMEOUT_S;
@@ -319,7 +319,7 @@ static int data_init(int server, crt_init_options_t *opt)
 		credits = opt->cio_ep_credits;
 	} else {
 		credits = CRT_DEFAULT_CREDITS_PER_EP_CTX;
-		d_getenv_int("CRT_CREDIT_EP_CTX", &credits);
+		d_getenv_uint("CRT_CREDIT_EP_CTX", &credits);
 	}
 
 	/* Must be set on the server when using UCX, will not affect OFI */
@@ -332,13 +332,13 @@ static int data_init(int server, crt_init_options_t *opt)
 		}
 	}
 	if (server)
-		setenv("UCX_IB_FORK_INIT", "n", 1);
+		d_setenv("UCX_IB_FORK_INIT", "n", 1);
 
 	/* This is a workaround for CART-871 if universe size is not set */
-	d_getenv_int("FI_UNIVERSE_SIZE", &fi_univ_size);
+	d_getenv_uint("FI_UNIVERSE_SIZE", &fi_univ_size);
 	if (fi_univ_size == 0) {
 		D_INFO("FI_UNIVERSE_SIZE was not set; setting to 2048\n");
-		setenv("FI_UNIVERSE_SIZE", "2048", 1);
+		d_setenv("FI_UNIVERSE_SIZE", "2048", 1);
 	}
 
 	if (credits == 0) {
@@ -529,19 +529,6 @@ check_grpid(crt_group_id_t grpid)
 	return rc;
 }
 
-static void
-apply_if_not_set(const char *env_name, const char *new_value)
-{
-	char *old_val;
-
-	old_val = getenv(env_name);
-
-	if (old_val == NULL) {
-		D_INFO("%s not set, setting to %s\n", env_name, new_value);
-		setenv(env_name, new_value, true);
-	}
-}
-
 static void
 prov_settings_apply(bool primary, crt_provider_t prov, crt_init_options_t *opt)
 {
@@ -562,26 +549,25 @@ prov_settings_apply(bool primary, crt_provider_t prov, crt_init_options_t *opt)
 	if (prov == CRT_PROV_OFI_VERBS_RXM ||
 	    prov == CRT_PROV_OFI_TCP_RXM) {
 		/* Use shared receive queues to avoid large mem consumption */
-		apply_if_not_set("FI_OFI_RXM_USE_SRX", "1");
+		d_setenv("FI_OFI_RXM_USE_SRX", "1", 0);
 
 		/* Only apply on the server side */
 		if (prov == CRT_PROV_OFI_TCP_RXM && crt_is_service())
-			apply_if_not_set("FI_OFI_RXM_DEF_TCP_WAIT_OBJ", "pollfd");
-
+			d_setenv("FI_OFI_RXM_DEF_TCP_WAIT_OBJ", "pollfd", 0);
 	}
 
 	if (prov == CRT_PROV_OFI_CXI)
 		mrc_enable = 1;
 
-	d_getenv_int("CRT_MRC_ENABLE", &mrc_enable);
+	d_getenv_uint("CRT_MRC_ENABLE", &mrc_enable);
 	if (mrc_enable == 0) {
 		D_INFO("Disabling MR CACHE (FI_MR_CACHE_MAX_COUNT=0)\n");
-		setenv("FI_MR_CACHE_MAX_COUNT", "0", 1);
+		d_setenv("FI_MR_CACHE_MAX_COUNT", "0", 1);
 	}
 
 	/* Use tagged messages for other providers, disable multi-recv */
 	if (prov != CRT_PROV_OFI_CXI && prov != CRT_PROV_OFI_TCP)
-		apply_if_not_set("NA_OFI_UNEXPECTED_TAG_MSG", "1");
+		d_setenv("NA_OFI_UNEXPECTED_TAG_MSG", "1", 0);
 
 	g_prov_settings_applied[prov] = true;
 }

src/cart/swim/swim.c

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2016 UChicago Argonne, LLC
- * (C) Copyright 2018-2023 Intel Corporation.
+ * (C) Copyright 2018-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -25,7 +25,7 @@ swim_prot_period_len_default(void)
 {
 	unsigned int val = SWIM_PROTOCOL_PERIOD_LEN;
 
-	d_getenv_int("SWIM_PROTOCOL_PERIOD_LEN", &val);
+	d_getenv_uint("SWIM_PROTOCOL_PERIOD_LEN", &val);
 	return val;
 }
 
@@ -34,7 +34,7 @@ swim_suspect_timeout_default(void)
 {
 	unsigned int val = SWIM_SUSPECT_TIMEOUT;
 
-	d_getenv_int("SWIM_SUSPECT_TIMEOUT", &val);
+	d_getenv_uint("SWIM_SUSPECT_TIMEOUT", &val);
 	return val;
 }
 
@@ -43,7 +43,7 @@ swim_ping_timeout_default(void)
 {
 	unsigned int val = SWIM_PING_TIMEOUT;
 
-	d_getenv_int("SWIM_PING_TIMEOUT", &val);
+	d_getenv_uint("SWIM_PING_TIMEOUT", &val);
 	return val;
 }
 

src/cart/utils/crt_utils.c

@@ -434,20 +434,20 @@ crtu_dc_mgmt_net_cfg_setenv(const char *name)
 
 	/* These two are always set */
 	D_INFO("setenv CRT_PHY_ADDR_STR=%s\n", crt_net_cfg_info.provider);
-	rc = setenv("CRT_PHY_ADDR_STR", crt_net_cfg_info.provider, 1);
+	rc = d_setenv("CRT_PHY_ADDR_STR", crt_net_cfg_info.provider, 1);
 	if (rc != 0)
 		D_GOTO(cleanup, rc = d_errno2der(errno));
 
 	sprintf(buf, "%d", crt_net_cfg_info.crt_ctx_share_addr);
 	D_INFO("setenv CRT_CTX_SHARE_ADDR=%d\n", crt_net_cfg_info.crt_ctx_share_addr);
-	rc = setenv("CRT_CTX_SHARE_ADDR", buf, 1);
+	rc = d_setenv("CRT_CTX_SHARE_ADDR", buf, 1);
 	if (rc != 0)
 		D_GOTO(cleanup, rc = d_errno2der(errno));
 
 	/* If the server has set this, the client must use the same value. */
 	if (crt_net_cfg_info.srv_srx_set != -1) {
 		sprintf(buf, "%d", crt_net_cfg_info.srv_srx_set);
-		rc = setenv("FI_OFI_RXM_USE_SRX", buf, 1);
+		rc = d_setenv("FI_OFI_RXM_USE_SRX", buf, 1);
 		D_INFO("setenv FI_OFI_RXM_USE_SRX=%d\n", crt_net_cfg_info.srv_srx_set);
 		if (rc != 0)
 			D_GOTO(cleanup, rc = d_errno2der(errno));
@@ -467,7 +467,7 @@ crtu_dc_mgmt_net_cfg_setenv(const char *name)
 	crt_timeout = getenv("CRT_TIMEOUT");
 	if (!crt_timeout) {
 		sprintf(buf, "%d", crt_net_cfg_info.crt_timeout);
-		rc = setenv("CRT_TIMEOUT", buf, 1);
+		rc = d_setenv("CRT_TIMEOUT", buf, 1);
 		D_INFO("setenv CRT_TIMEOUT=%d\n", crt_net_cfg_info.crt_timeout);
 		if (rc != 0)
 			D_GOTO(cleanup, rc = d_errno2der(errno));
@@ -477,7 +477,7 @@ crtu_dc_mgmt_net_cfg_setenv(const char *name)
 
 	ofi_interface = getenv("OFI_INTERFACE");
 	if (!ofi_interface) {
-		rc = setenv("OFI_INTERFACE", crt_net_cfg_info.interface, 1);
+		rc = d_setenv("OFI_INTERFACE", crt_net_cfg_info.interface, 1);
 		D_INFO("Setting OFI_INTERFACE=%s\n", crt_net_cfg_info.interface);
 		if (rc != 0)
 			D_GOTO(cleanup, rc = d_errno2der(errno));
@@ -489,7 +489,7 @@ crtu_dc_mgmt_net_cfg_setenv(const char *name)
 
 	ofi_domain = getenv("OFI_DOMAIN");
 	if (!ofi_domain) {
-		rc = setenv("OFI_DOMAIN", crt_net_cfg_info.domain, 1);
+		rc = d_setenv("OFI_DOMAIN", crt_net_cfg_info.domain, 1);
 		D_INFO("Setting OFI_DOMAIN=%s\n", crt_net_cfg_info.domain);
 		if (rc != 0)
 			D_GOTO(cleanup, rc = d_errno2der(errno));

src/client/api/event.c

@@ -1,5 +1,5 @@
 /**
- * (C) Copyright 2016-2023 Intel Corporation.
+ * (C) Copyright 2016-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -97,7 +97,7 @@ daos_eq_lib_init()
 
 	eq_ref = 1;
 
-	d_getenv_int("D_POLL_TIMEOUT", &ev_prog_timeout);
+	d_getenv_uint32_t("D_POLL_TIMEOUT", &ev_prog_timeout);
 
 unlock:
 	D_MUTEX_UNLOCK(&daos_eq_lock);

src/client/api/tests/eq_tests.c

@@ -1242,8 +1242,8 @@ eq_ut_setup(void **state)
 {
 	int rc;
 
-	setenv("OFI_INTERFACE", "lo", 1);
-	setenv("D_PROVIDER", "ofi+tcp", 1);
+	d_setenv("OFI_INTERFACE", "lo", 1);
+	d_setenv("D_PROVIDER", "ofi+tcp", 1);
 
 	rc = daos_debug_init(DAOS_LOG_DEFAULT);
 	if (rc != 0) {

src/common/mem.c

@@ -1,5 +1,5 @@
 /**
- * (C) Copyright 2016-2023 Intel Corporation.
+ * (C) Copyright 2016-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -61,7 +61,7 @@ umempobj_settings_init(bool md_on_ssd)
 		return rc;
 	}
 
-	d_getenv_int("DAOS_MD_ON_SSD_MODE", &md_mode);
+	d_getenv_uint("DAOS_MD_ON_SSD_MODE", &md_mode);
 
 	switch (md_mode) {
 	case DAOS_MD_BMEM:

src/common/misc.c

@@ -1,5 +1,5 @@
 /**
- * (C) Copyright 2016-2023 Intel Corporation.
+ * (C) Copyright 2016-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -656,7 +656,7 @@ daos_crt_init_opt_get(bool server, int ctx_nr)
 	daos_crt_init_opt.cio_use_sensors = server;
 
 	/** configure cart for maximum bulk threshold */
-	d_getenv_int("DAOS_RPC_SIZE_LIMIT", &limit);
+	d_getenv_uint32_t("DAOS_RPC_SIZE_LIMIT", &limit);
 
 	daos_crt_init_opt.cio_use_expected_size = 1;
 	daos_crt_init_opt.cio_max_expected_size = limit ? limit : DAOS_RPC_SIZE;

src/dtx/dtx_srv.c

@@ -1,5 +1,5 @@
 /**
- * (C) Copyright 2019-2023 Intel Corporation.
+ * (C) Copyright 2019-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -512,7 +512,7 @@ dtx_init(void)
 	int	rc;
 
 	dtx_agg_thd_cnt_up = DTX_AGG_THD_CNT_DEF;
-	d_getenv_int("DAOS_DTX_AGG_THD_CNT", &dtx_agg_thd_cnt_up);
+	d_getenv_uint32_t("DAOS_DTX_AGG_THD_CNT", &dtx_agg_thd_cnt_up);
 	if (dtx_agg_thd_cnt_up < DTX_AGG_THD_CNT_MIN || dtx_agg_thd_cnt_up > DTX_AGG_THD_CNT_MAX) {
 		D_WARN("Invalid DTX aggregation count threshold %u, the valid range is [%u, %u], "
 		       "use the default value %u\n", dtx_agg_thd_cnt_up, DTX_AGG_THD_CNT_MIN,
@@ -524,7 +524,7 @@ dtx_init(void)
 	D_INFO("Set DTX aggregation count threshold as %u (entries)\n", dtx_agg_thd_cnt_up);
 
 	dtx_agg_thd_age_up = DTX_AGG_THD_AGE_DEF;
-	d_getenv_int("DAOS_DTX_AGG_THD_AGE", &dtx_agg_thd_age_up);
+	d_getenv_uint32_t("DAOS_DTX_AGG_THD_AGE", &dtx_agg_thd_age_up);
 	if (dtx_agg_thd_age_up < DTX_AGG_THD_AGE_MIN || dtx_agg_thd_age_up > DTX_AGG_THD_AGE_MAX) {
 		D_WARN("Invalid DTX aggregation age threshold %u, the valid range is [%u, %u], "
 		       "use the default value %u\n", dtx_agg_thd_age_up, DTX_AGG_THD_AGE_MIN,
@@ -536,7 +536,7 @@ dtx_init(void)
 	D_INFO("Set DTX aggregation time threshold as %u (seconds)\n", dtx_agg_thd_age_up);
 
 	dtx_batched_ult_max = DTX_BATCHED_ULT_DEF;
-	d_getenv_int("DAOS_DTX_BATCHED_ULT_MAX", &dtx_batched_ult_max);
+	d_getenv_uint32_t("DAOS_DTX_BATCHED_ULT_MAX", &dtx_batched_ult_max);
 	D_INFO("Set the max count of DTX batched commit ULTs as %d\n", dtx_batched_ult_max);
 
 	rc = dbtree_class_register(DBTREE_CLASS_DTX_CF,

src/engine/init.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2016-2023 Intel Corporation.
+ * (C) Copyright 2016-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -454,7 +454,7 @@ set_abt_max_num_xstreams(int n)
 	if (value == NULL)
 		return -DER_NOMEM;
 	D_INFO("Setting %s to %s\n", name, value);
-	rc = setenv(name, value, 1 /* overwrite */);
+	rc = d_setenv(name, value, 1 /* overwrite */);
 	D_FREE(value);
 	if (rc != 0)
 		return daos_errno2der(errno);

src/engine/srv.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2016-2023 Intel Corporation.
+ * (C) Copyright 2016-2024 Intel Corporation.
  *
  * SPDX-License-Identifier: BSD-2-Clause-Patent
  */
@@ -1037,7 +1037,7 @@ dss_xstreams_init(void)
 		D_INFO("ULT mmap()'ed stack allocation is disabled.\n");
 #endif
 
-	d_getenv_int("DAOS_SCHED_RELAX_INTVL", &sched_relax_intvl);
+	d_getenv_uint("DAOS_SCHED_RELAX_INTVL", &sched_relax_intvl);
 	if (sched_relax_intvl == 0 ||
 	    sched_relax_intvl > SCHED_RELAX_INTVL_MAX) {
 		D_WARN("Invalid relax interval %u, set to default %u msecs.\n",
@@ -1059,7 +1059,7 @@ dss_xstreams_init(void)
 	D_INFO("CPU relax mode is set to [%s]\n",
 	       sched_relax_mode2str(sched_relax_mode));
 
-	d_getenv_int("DAOS_SCHED_UNIT_RUNTIME_MAX", &sched_unit_runtime_max);
+	d_getenv_uint("DAOS_SCHED_UNIT_RUNTIME_MAX", &sched_unit_runtime_max);
 	d_getenv_bool("DAOS_SCHED_WATCHDOG_ALL", &sched_watchdog_all);
 
 	/* start the execution streams */