Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Fix rv32e mem build with recent gcc #73

Merged
merged 1 commit into from
Jan 8, 2025

Conversation

nsauzede
Copy link
Contributor

@nsauzede nsauzede commented Jan 8, 2025

It seems like with recent gcc (15.0+ ?), rebuilding the rv32e memory generates zicsr instructions:

/usr/local/share/gcc-riscv32-embedded-elf/bin//riscv32-embedded-elf-as -march=rv32e -c boot.s -o boot.o
boot.s: Assembler messages:
boot.s:48: Error: unrecognized opcode `csrr a0,mhartid', extension `zicsr' required

This trivial patch changes the default build arch to include the zicsr extension.
Note that your rv32e toolchain should be configured like this:
--with-arch=rv32e_zicsr --with-abi=ilp32e
Then we are rebuild the darksocv.mem again, eg: with this gcc:

Using built-in specs.
COLLECT_GCC=./gcc-riscv32-embedded-elf/bin/riscv32-embedded-elf-gcc
COLLECT_LTO_WRAPPER=/tmp/gcc-riscv32-embedded-elf/libexec/gcc/riscv32-embedded-elf/15.0.0/lto-wrapper
Target: riscv32-embedded-elf
Configured with: ../configure --target=riscv32-embedded-elf --enable-languages=c --disable-shared --disable-threads --disable-multilib --disable-gdb --disable-libssp --with-newlib --with-arch=rv32e_zicsr --with-abi=ilp32e --prefix=/usr/local/share/gcc-riscv32-embedded-elf/bin
Thread model: single
Supported LTO compression algorithms: zlib
gcc version 15.0.0 20250107 (experimental) (GCC)

@samsoniuk samsoniuk merged commit 546ea64 into darklife:master Jan 8, 2025
@samsoniuk
Copy link
Member

thank you! :)

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants