Skip to content

Commit

Permalink
Merge branch 'master' into bump-profiling
Browse files Browse the repository at this point in the history
  • Loading branch information
chenyan-dfinity authored Oct 17, 2023
2 parents a73eac4 + c342311 commit 28ed6ac
Show file tree
Hide file tree
Showing 5 changed files with 54 additions and 8 deletions.
2 changes: 1 addition & 1 deletion Cargo.lock

Some generated files are not rendered by default. Learn more about how customized files appear on GitHub.

2 changes: 1 addition & 1 deletion rust/candid/Cargo.toml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[package]
name = "candid"
version = "0.9.9"
version = "0.9.10"
edition = "2021"
authors = ["DFINITY Team"]
description = "Candid is an interface description language (IDL) for interacting with canisters running on the Internet Computer."
Expand Down
6 changes: 5 additions & 1 deletion rust/candid/src/de.rs
Original file line number Diff line number Diff line change
Expand Up @@ -423,7 +423,11 @@ impl<'de> Deserializer<'de> {
where
V: Visitor<'de>,
{
Err(Error::subtype("Cannot decode empty type"))
Err(if *self.wire_type == TypeInner::Empty {
Error::msg("Cannot decode empty type")
} else {
Error::subtype("Cannot decode empty type")
})
}
fn deserialize_future<'a, V>(&'a mut self, visitor: V) -> Result<V::Value>
where
Expand Down
5 changes: 0 additions & 5 deletions test/construct.test.did
Original file line number Diff line number Diff line change
Expand Up @@ -62,11 +62,6 @@ assert blob "DIDL\01\6d\00\01\00\02\00\00" == "(vec { vec {}; vec {} })" : (V
assert blob "DIDL\01\6d\00\01\00\02\00\00" == "(vec { vec {}; vec {} })" : (vec vec opt empty) "vec: non-recursive tree";
assert blob "DIDL\01\6d\7f\01\00\e8\07" : (vec null) "vec null";
assert blob "DIDL\01\6d\7f\01\00\e8\07" : (vec opt nat) "vec null <: vec opt nat";
assert blob "DIDL\01\6d\7f\01\00\80\94\eb\dc\03" !: (vec opt nat) "space bomb: vec null <: vec opt nat";
assert blob "DIDL\01\6d\70\01\00\80\94\eb\dc\03" !: (opt nat) "space bomb: send vec reserved to opt nat";
assert blob "DIDL\04\6c\03\01\7f\02\01\03\02\6c\01\01\70\6c\00\6d\00\01\03\80\94\eb\dc\03" !: (vec record {null;record{reserved};record{}}) "space bomb: zero-sized record";
assert blob "DIDL\02\6d\01\6d\7f\01\00\05\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f" !: (vec vec null) "space bomb: vec vec null";
assert blob "DIDL\03\6c\01\d6\fc\a7\02\01\6d\02\6c\00\01\00\80\ad\e2\04" !: (vec record {}) "space bomb: vec record {}";
assert "(vec { 1; -1 })" !: (vec nat) "vec: type mismatch";
assert blob "DIDL\01\6d\7c\01\00" !: (vec int) "vec: too short";
assert blob "DIDL\01\6d\7c\01\00\02\01" !: (vec int) "vec: too short";
Expand Down
47 changes: 47 additions & 0 deletions test/spacebomb.test.did
Original file line number Diff line number Diff line change
@@ -0,0 +1,47 @@

// Space bomb tests


// Messages with more than 2_000_000 zero-length elements in vectors should be rejected

// \80\94\eb\dc\03 is 1000_000_000
// \80\ad\e2\04 is 10_000_000
// \80\89\7a is 2_000_000
// \ff\ff\3f is 1_048_575
// \80\b5\18 is 400_000


// Plain decoding (unused arguments)
assert blob "DIDL\01\6d\7f\01\00\80\94\eb\dc\03" !: () "vec null (extra argument)";
assert blob "DIDL\01\6d\70\01\00\80\94\eb\dc\03" !: () "vec reserved (extra argument)";
assert blob "DIDL\04\6c\03\01\7f\02\01\03\02\6c\01\01\70\6c\00\6d\00\01\03\80\94\eb\dc\03" !: () "zero-sized record (extra argument)";
assert blob "DIDL\02\6d\01\6d\7f\01\00\05\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f" !: () "vec vec null (extra argument)";
assert blob "DIDL\03\6c\01\d6\fc\a7\02\01\6d\02\6c\00\01\00\80\ad\e2\04" !: () "vec record {} (extra argument)";

// Messages with exactly 2_000_000 zero-length elements should succeed
assert blob "DIDL\01\6d\7f\01\00\80\89\7a" : () "vec null (exactly 2000000)";
assert blob "DIDL\01\6d\70\01\00\80\89\7a" : () "vec reserved (exactly 2000000)";
assert blob "DIDL\04\6c\03\01\7f\02\01\03\02\6c\01\01\70\6c\00\6d\00\01\03\80\89\7a" : () "zero-sized record (exactly 2000000)";
assert blob "DIDL\02\6d\01\6d\7f\01\00\05\80\b5\18\80\b5\18\80\b5\18\80\b5\18\80\b5\18" : () "vec vec null (exactly 2000000)";
assert blob "DIDL\03\6c\01\d6\fc\a7\02\01\6d\02\6c\00\01\00\80\89\7a" : () "vec record {} (exactly 2000000)";

// Messages with exactly 2_000_001 zero-length elements should fail
assert blob "DIDL\01\6d\7f\01\00\80\89\7b" !: () "vec null (exactly 2000001)";
assert blob "DIDL\01\6d\70\01\00\80\89\7b" !: () "vec reserved (exactly 2000001)";
assert blob "DIDL\04\6c\03\01\7f\02\01\03\02\6c\01\01\70\6c\00\6d\00\01\03\80\89\7b" !: () "zero-sized record (exactly 2000001)";
assert blob "DIDL\02\6d\01\6d\7f\01\00\05\80\b5\18\80\b5\18\80\b5\18\80\b5\18\80\b5\19" !: () "vec vec null (exactly 2000001)";
assert blob "DIDL\03\6c\01\d6\fc\a7\02\01\6d\02\6c\00\01\00\80\89\7b" !: () "vec record {} (exactly 2000001)";

// Decoding to actual type
assert blob "DIDL\01\6d\7f\01\00\80\94\eb\dc\03" !: (vec opt nat) "vec null (not ignored)";
assert blob "DIDL\01\6d\70\01\00\80\94\eb\dc\03" !: (vec reserved) "vec reserved (not ignored)";
assert blob "DIDL\04\6c\03\01\7f\02\01\03\02\6c\01\01\70\6c\00\6d\00\01\03\80\94\eb\dc\03" !: (vec record {null;record{reserved};record{}}) "zero-sized record (not ignored)";
assert blob "DIDL\02\6d\01\6d\7f\01\00\05\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f" !: (vec vec null) "vec vec null (not ignored)";
assert blob "DIDL\03\6c\01\d6\fc\a7\02\01\6d\02\6c\00\01\00\80\ad\e2\04" !: (vec record {}) "vec record {} (not ignored)";

// Decoding under opt
assert blob "DIDL\01\6d\7f\01\00\80\94\eb\dc\03" !: (opt nat) "vec null (subtyping)";
assert blob "DIDL\01\6d\70\01\00\80\94\eb\dc\03" !: (opt nat) "vec reserved (subtyping)";
assert blob "DIDL\04\6c\03\01\7f\02\01\03\02\6c\01\01\70\6c\00\6d\00\01\03\80\94\eb\dc\03" !: (opt nat) "zero-sized record (subtyping)";
assert blob "DIDL\02\6d\01\6d\7f\01\00\05\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f\ff\ff\3f" !: (vec opt nat) "vec vec null (subtyping)";
assert blob "DIDL\03\6c\01\d6\fc\a7\02\01\6d\02\6c\00\01\00\80\ad\e2\04" !: (opt nat) "vec record {} (subtyping)";

0 comments on commit 28ed6ac

Please sign in to comment.