initial Aarch64 support

changelog/dmd.AArch64.dd

@@ -0,0 +1,28 @@
+# Add code generation for AArch64 CPU
+
+Adds the switch `-arm` which causes dmd to emit AArch64 code.
+
+This is a work in progress. It is not a functioning compiler.
+
+Things not implemented:
+
+* inline assembler
+* object file generation for mscoff and mach formats
+* Elf object file generation does not use AArch64 fixups
+* floating point
+* vector operations
+* op= operators
+* block initialization of structs
+* pic/pie
+* non-trivial lvalues
+* stack arguments
+* alloca()
+* exception handling
+* correct DWARF symbolic debug info
+* testing on an actual AArch64 computer
+* line coverage reports
+* stack stomping code
+* local stack frames larger than 64Kb
+* variadic arguments
+* disassembler is incomplete
+* ENDBR64

compiler/src/.dscanner.ini

@@ -127,6 +127,9 @@ unused_variable_check="-dmd.backend.aarray,\
 -dmd.backend.cgelem,\
 -dmd.backend.cgobj,\
 -dmd.backend.cgsched,\
+-dmd.backend.arm.cod1,\
+-dmd.backend.arm.cod2,\
+-dmd.backend.arm.cod3,\
 -dmd.backend.arm.disasmarm,\
 -dmd.backend.arm.instr,\
 -dmd.backend.x86.cgxmm,\

compiler/src/build.d

@@ -1623,6 +1623,7 @@ auto sourceFiles()
  x86/cod3.d cv8.d dcgcv.d pdata.d util2.d var.d backconfig.d drtlsym.d dwarfeh.d ptrntab.d
  dvarstats.d dwarfdbginf.d cgen.d goh.d barray.d cgcse.d elpicpie.d
  machobj.d elfobj.d mscoffobj.d filespec.d cgobj.d aarray.d x86/disasm86.d arm/disasmarm.d arm/instr.d
+ arm/cod1.d arm/cod2.d arm/cod3.d arm/cod4.d
  "
  ),
  };