-
-
Notifications
You must be signed in to change notification settings - Fork 635
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
[stable] Prepare TargetC
for ARM bit-fields special case
#16742
Conversation
Thanks for your pull request and interest in making D better, @kinke! We are looking forward to reviewing it, and you should be hearing from a maintainer soon.
Please see CONTRIBUTING.md for more information. If you have addressed all reviews or aren't sure how to proceed, don't hesitate to ping us with a simple comment. Bugzilla referencesYour PR doesn't reference any Bugzilla issue. If your PR contains non-trivial changes, please reference a Bugzilla issue or create a manual changelog. Testing this PR locallyIf you don't have a local development environment setup, you can use Digger to test this PR: dub run digger -- build "stable + dmd#16742" |
My preference would be to add a target hook for this. Looks like the behaviour you want is controlled by this macro in GCC (which doesn't explicitly match for a specific target/compiler combo) https://gcc.gnu.org/onlinedocs/gccint/Storage-Layout.html#index-EMPTY_005fFIELD_005fBOUNDARY or... |
I hope this is the last bit-field special case in a while. If so, we'd only have these 3 |
The docs suggest there are more permutations than just this gcc/clang/arm special case. |
Required for 32-bit ARM, and non-Apple 64-bit ARM targets. The only difference to `Gcc_Clang` is that anonymous and 0-length bit-fields do contribute to the aggregate alignment. Caught by existing proper C interop tests in runnable_cxx/testbitfields.d on such targets. The hardcoded bad tests in runnable/{bitfieldsposix64.c,dbitfieldsposix64.d} however now fail after the fix, on such targets again.
I hope we won't need much more in the near future. I guess the generic gcc options there also account for the 'Microsoft style' behavior; proper support for all gcc-supported targets would likely entail a rewrite of this frontend code, adding more complexity. I've refactored it to a |
BitFieldStyle.Gcc_Clang_ARM
TargetC
for ARM bit-fields special case
Yes, I think it's PCC vs non-PCC bit field layouts.
We're probably not far off how GCC code is, much like the clean room implementation of unwind exceptions follows the same logic flow. |
Alright, you sound optimistic, good. :) - Anything else to do here? |
Required for 32-bit ARM, and non-Apple 64-bit ARM targets.
The only difference to
Gcc_Clang
is that anonymous and 0-length bit-fields do contribute to the aggregate alignment.Caught by existing proper C interop tests in
runnable_cxx/testbitfields.d
on such targets. The hardcoded bad tests inrunnable/{bitfieldsposix64.c,dbitfieldsposix64.d}
however now fail after the fix, on such targets again.See ldc-developers/ldc#4707 (comment) and following.