Fixing up some hwintrinsic flags for the x86 intrinsics. #16114

tannergooding · 2018-01-31T02:37:26Z

tannergooding · 2018-01-31T02:38:17Z

src/jit/hwintrinsiclistxarch.h

 HARDWARE_INTRINSIC(SSE_IsSupported,                                  "get_IsSupported",                                  SSE,        -1,           0,            0,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid},           HW_Category_IsSupportedProperty,               HW_Flag_NoFlag)                 
 HARDWARE_INTRINSIC(SSE_Add,                                          "Add",                                              SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_addps,     INS_invalid},           HW_Category_SimpleSIMD,                        HW_Flag_Commutative)                 
-HARDWARE_INTRINSIC(SSE_AddScalar,                                    "AddScalar",                                        SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_addss,     INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_Commutative)
+HARDWARE_INTRINSIC(SSE_AddScalar,                                    "AddScalar",                                        SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_addss,     INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_CopyUpperBits)


Most of the scalar intrinsics are not commutative, as they take their upper bits from the first operand.

tannergooding · 2018-01-31T02:38:54Z

src/jit/hwintrinsiclistxarch.h

 HARDWARE_INTRINSIC(SSE_CompareEqualUnorderedScalar,                  "CompareEqualUnorderedScalar",                      SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_ucomiss,   INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_MultiIns|HW_Flag_NoContainment)
 HARDWARE_INTRINSIC(SSE_CompareGreaterThan,                           "CompareGreaterThan",                               SSE,        6,            16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_cmpps,     INS_invalid},           HW_Category_SimpleSIMD,                        HW_Flag_NoFlag)
 HARDWARE_INTRINSIC(SSE_CompareGreaterThanOrderedScalar,              "CompareGreaterThanOrderedScalar",                  SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_comiss,    INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_MultiIns|HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(SSE_CompareGreaterThanScalar,                     "CompareGreaterThanScalar",                         SSE,        6,            16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_cmpss,     INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE_CompareGreaterThanScalar,                     "CompareGreaterThanScalar",                         SSE,        6,            16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_cmpss,     INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_CopyUpperBits)


Most of the scalar intrinsics should have CopyUpperBits, since the upper bits come from the first operand.

Although RyuJIT codegen already has the CopyUpperBits semantic for these 2-op intrinsics, it is better to explicitly indicate it here. Thanks!

tannergooding · 2018-01-31T02:39:18Z

src/jit/hwintrinsiclistxarch.h

-HARDWARE_INTRINSIC(SSE_ConvertToInt32,                               "ConvertToInt32",                                   SSE,        -1,           16,           1,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_cvtss2si,  INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_NoContainment)
-HARDWARE_INTRINSIC(SSE_ConvertToInt64,                               "ConvertToInt64",                                   SSE,        -1,           16,           1,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_cvtss2si,  INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_NoContainment)
+HARDWARE_INTRINSIC(SSE_CompareUnorderedScalar,                       "CompareUnorderedScalar",                           SSE,        3,            16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_cmpss,     INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE_ConvertToInt32,                               "ConvertToInt32",                                   SSE,        -1,           16,           1,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_cvtss2si,  INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_NoFlag)


ConvertToInt32 and ConvertToInt64 do support containment.

As well as the WithTruncation forms of the same instructions and Divide

tannergooding · 2018-01-31T02:40:56Z

src/jit/hwintrinsiclistxarch.h

-HARDWARE_INTRINSIC(SSE_MultiplyScalar,                               "MultiplyScalar",                                   SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_mulss,     INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_Commutative)
-HARDWARE_INTRINSIC(SSE_Or,                                           "Or",                                               SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_orps,      INS_invalid},           HW_Category_SimpleSIMD,                        HW_Flag_NoFlag)
+HARDWARE_INTRINSIC(SSE_MultiplyScalar,                               "MultiplyScalar",                                   SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_mulss,     INS_invalid},           HW_Category_SIMDScalar,                        HW_Flag_CopyUpperBits)
+HARDWARE_INTRINSIC(SSE_Or,                                           "Or",                                               SSE,        -1,           16,           2,           {INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_invalid,   INS_orps,      INS_invalid},           HW_Category_SimpleSIMD,                        HW_Flag_Commutative)


Or is commutative

tannergooding · 2018-01-31T02:41:44Z

FYI. @4creators, ~~we should probably ensure that the SSE2 PR matches (I believe you fixed up some of these in your PR as well).~~

Edit: Nevermind, the SSE2 PR does look to be correct for all the cases (most of this impacted scalar intrinsics anyways, which aren't implemented by said PR 😄).

tannergooding · 2018-01-31T17:37:27Z

Rebased to resolve a merge conflict

tannergooding · 2018-01-31T17:37:34Z

test Windows_NT x64 Checked jitincompletehwintrinsic
test Windows_NT x64 Checked jitx86hwintrinsicnoavx
test Windows_NT x64 Checked jitx86hwintrinsicnoavx2
test Windows_NT x64 Checked jitx86hwintrinsicnosimd
test Windows_NT x64 Checked jitnox86hwintrinsic

test Windows_NT x86 Checked jitincompletehwintrinsic
test Windows_NT x86 Checked jitx86hwintrinsicnoavx
test Windows_NT x86 Checked jitx86hwintrinsicnoavx2
test Windows_NT x86 Checked jitx86hwintrinsicnosimd
test Windows_NT x86 Checked jitnox86hwintrinsic

test Ubuntu x64 Checked jitincompletehwintrinsic
test Ubuntu x64 Checked jitx86hwintrinsicnoavx
test Ubuntu x64 Checked jitx86hwintrinsicnoavx2
test Ubuntu x64 Checked jitx86hwintrinsicnosimd
test Ubuntu x64 Checked jitnox86hwintrinsic

tannergooding · 2018-01-31T21:00:21Z

Ubuntu failures are unrelated: https://github.com/dotnet/coreclr/issues/16134

tannergooding · 2018-01-31T22:16:24Z

This should be ready for review.

fiigii

LGTM Thanks!

fiigii · 2018-02-01T00:01:35Z

Just found one mistake! SSE_Shuffle should have HW_Flag_FullRangeIMM.

tannergooding · 2018-02-01T00:21:06Z

Just found one mistake! SSE_Shuffle should have HW_Flag_FullRangeIMM.

Fixed.

CarolEidt

LGTM

…lags Fixing up some hwintrinsic flags for the x86 intrinsics. Commit migrated from dotnet/coreclr@0fbb86e

tannergooding commented Jan 31, 2018

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jkotas added the area-CodeGen label Jan 31, 2018

tannergooding mentioned this pull request Jan 31, 2018

Updating the HWIntrinsic codegen to support marking LoadVector128 and LoadAlignedVector128 as contained. #16095

Merged

fiigii approved these changes Jan 31, 2018

View reviewed changes

Fixing up some hwintrinsic flags for the x86 intrinsics.

85fa597

CarolEidt reviewed Feb 1, 2018

View reviewed changes

CarolEidt approved these changes Feb 1, 2018

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tannergooding merged commit 0fbb86e into dotnet:master Feb 1, 2018

tannergooding deleted the hwintrin-flags branch May 30, 2018 04:15

picenka21 pushed a commit to picenka21/runtime that referenced this pull request Feb 18, 2022

Merge pull request dotnet/coreclr#16114 from tannergooding/hwintrin-f…

d9af087

…lags Fixing up some hwintrinsic flags for the x86 intrinsics. Commit migrated from dotnet/coreclr@0fbb86e

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Fixing up some hwintrinsic flags for the x86 intrinsics. #16114

Fixing up some hwintrinsic flags for the x86 intrinsics. #16114

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Fixing up some hwintrinsic flags for the x86 intrinsics. #16114

Fixing up some hwintrinsic flags for the x86 intrinsics. #16114

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