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9 changes: 5 additions & 4 deletions src/jit/hwintrinsicxarch.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -540,27 +540,28 @@ GenTree* Compiler::addRangeCheckIfNeeded(NamedIntrinsic intrinsic, GenTree* last
// Arguments:
// isa - Instruction set
// Return Value:
// true - all the hardware intrinsics of "isa" are implemented in RyuJIT.
// true - all the hardware intrinsics of "isa" exposed in CoreFX
// System.Runtime.Intrinsics.Experimental assembly are implemented in RyuJIT.
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I do not think we need the new comment. JIT implementation is not related to corefx surface and the S.R.Intrinsic.Experimental package is a temporary solution.

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S.R.Intrinsic.Experimental package is a temporary solution

Agree, however, function logic has changed and old description is wrong. Perhaps I will add TODO-XARCH-Cq to describe it and remember to update function and comment in future. I would expect that once we have all ISAs implemented we will not need this check and function anymore.

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we will not need this check and function anymore.

Not really, I think that we always need this logic for future work (e.g., AVX-512) even though the current ISA support gets completed.

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I think that we always need this logic for future work (e.g., AVX-512)

Yes, you are right, but only under the condition that we will follow implementation pattern where APIs are exposed first and implemented later.

//
bool Compiler::isFullyImplmentedISAClass(InstructionSet isa)
{
switch (isa)
{
case InstructionSet_SSE42:
case InstructionSet_AVX:
case InstructionSet_AVX2:
case InstructionSet_AES:
case InstructionSet_BMI1:
case InstructionSet_BMI2:
case InstructionSet_FMA:
case InstructionSet_PCLMULQDQ:
return false;

case InstructionSet_AVX:
case InstructionSet_AVX2:
case InstructionSet_SSE:
case InstructionSet_SSE2:
case InstructionSet_SSE3:
case InstructionSet_SSSE3:
case InstructionSet_SSE41:
case InstructionSet_SSE42:
case InstructionSet_LZCNT:
case InstructionSet_POPCNT:
return true;
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