Ensure we mark op2 as delayFree if it is rmw and the parent node retu…

…rns a non-SIMD type (#36226)

src/coreclr/src/jit/lsraxarch.cpp

@@ -2666,17 +2666,32 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree)
                 {
                     srcCount += BuildAddrUses(op2->gtGetOp1());
                 }
-                else if (isRMW && !op2->isContained())
+                else if (isRMW)
                 {
-                    if (HWIntrinsicInfo::IsCommutative(intrinsicId))
+                    if (!op2->isContained() && HWIntrinsicInfo::IsCommutative(intrinsicId))
                     {
+                        // When op2 is not contained and we are commutative, we can set op2
+                        // to also be a tgtPrefUse. Codegen will then swap the operands.
+
                         tgtPrefUse2 = BuildUse(op2);
                         srcCount += 1;
                     }
-                    else
+                    else if (!op2->isContained() || varTypeIsArithmetic(intrinsicTree->TypeGet()))
                     {
+                        // When op2 is not contained or if we are producing a scalar value
+                        // we need to mark it as delay free because the operand and target
+                        // exist in the same register set.
+
                         srcCount += BuildDelayFreeUses(op2);
                     }
+                    else
+                    {
+                        // When op2 is contained and we are not producing a scalar value we
+                        // have no concerns of overwriting op2 because they exist in different
+                        // register sets.
+
+                        srcCount += BuildOperandUses(op2);
+                    }
                 }
                 else
                 {