Disable mask registers if on non-sve

dotnet · Jun 28, 2024 · bcfd8a8 · bcfd8a8
1 parent 1e69fd3
commit bcfd8a8
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Showing 9 changed files with 37 additions and 20 deletions.
diff --git a/src/coreclr/jit/codegencommon.cpp b/src/coreclr/jit/codegencommon.cpp
@@ -178,7 +178,7 @@ CodeGenInterface::CodeGenInterface(Compiler* theCompiler)
 {
 }
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
 void CodeGenInterface::CopyRegisterInfo()
 {
 #if defined(TARGET_AMD64)
@@ -189,7 +189,7 @@ void CodeGenInterface::CopyRegisterInfo()
     rbmAllMask        = compiler->rbmAllMask;
     rbmMskCalleeTrash = compiler->rbmMskCalleeTrash;
 }
-#endif // TARGET_XARCH
+#endif // FEATURE_MASKED_HW_INTRINSICS
 
 /*****************************************************************************/
 

diff --git a/src/coreclr/jit/codegeninterface.h b/src/coreclr/jit/codegeninterface.h
@@ -88,7 +88,7 @@ class CodeGenInterface
     }
 #endif // TARGET_AMD64
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     regMaskTP rbmAllMask;
     regMaskTP rbmMskCalleeTrash;
 

diff --git a/src/coreclr/jit/compiler.cpp b/src/coreclr/jit/compiler.cpp
@@ -3478,17 +3478,28 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
     }
 #endif // TARGET_AMD64
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     rbmAllMask         = RBM_ALLMASK_INIT;
     rbmMskCalleeTrash  = RBM_MSK_CALLEE_TRASH_INIT;
     cntCalleeTrashMask = CNT_CALLEE_TRASH_MASK_INIT;
 
+#ifdef TARGET_XARCH
     if (canUseEvexEncoding())
     {
         rbmAllMask |= RBM_ALLMASK_EVEX;
         rbmMskCalleeTrash |= RBM_MSK_CALLEE_TRASH_EVEX;
         cntCalleeTrashMask += CNT_CALLEE_TRASH_MASK_EVEX;
     }
+#endif // TARGET_XARCH
+
+#ifdef TARGET_ARM64
+    if (compOpportunisticallyDependsOn(InstructionSet_Sve))
+    {
+        rbmAllMask = RBM_ALLMASK;
+        rbmMskCalleeTrash = RBM_MSK_CALLEE_TRASH;
+        cntCalleeTrashMask = CNT_CALLEE_TRASH_MASK;
+    }
+#endif // TARGET_ARM64
 
     // Make sure we copy the register info and initialize the
     // trash regs after the underlying fields are initialized
@@ -3501,7 +3512,7 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
     memcpy(varTypeCalleeTrashRegs, vtCalleeTrashRegs, sizeof(regMaskTP) * TYP_COUNT);
 
     codeGen->CopyRegisterInfo();
-#endif // TARGET_XARCH
+#endif // FEATURE_MASKED_HW_INTRINSICS
 }
 
 #ifdef DEBUG

diff --git a/src/coreclr/jit/compiler.h b/src/coreclr/jit/compiler.h
@@ -11412,7 +11412,7 @@ class Compiler
 
 #endif // TARGET_AMD64
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
 private:
     // The following are for initializing register allocator "constants" defined in targetamd64.h
     // that now depend upon runtime ISA information, e.g., the presence of AVX512F/VL, which adds
@@ -11448,7 +11448,7 @@ class Compiler
     {
         return this->cntCalleeTrashMask;
     }
-#endif // TARGET_XARCH
+#endif // FEATURE_MASKED_HW_INTRINSICS
 
 }; // end of class Compiler
 

diff --git a/src/coreclr/jit/emit.cpp b/src/coreclr/jit/emit.cpp
@@ -754,9 +754,9 @@ void emitter::emitBegCG(Compiler* comp, COMP_HANDLE cmpHandle)
     rbmFltCalleeTrash = emitComp->rbmFltCalleeTrash;
 #endif // TARGET_AMD64
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     rbmMskCalleeTrash = emitComp->rbmMskCalleeTrash;
-#endif // TARGET_XARCH
+#endif // FEATURE_MASKED_HW_INTRINSICS
 }
 
 void emitter::emitEndCG()

diff --git a/src/coreclr/jit/emit.h b/src/coreclr/jit/emit.h
@@ -2509,14 +2509,14 @@ class emitter
     }
 #endif // TARGET_AMD64
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     regMaskTP rbmMskCalleeTrash;
 
     FORCEINLINE regMaskTP get_RBM_MSK_CALLEE_TRASH() const
     {
         return this->rbmMskCalleeTrash;
     }
-#endif // TARGET_AMD64
+#endif // FEATURE_MASKED_HW_INTRINSICS
 
     CORINFO_FIELD_HANDLE emitFltOrDblConst(double constValue, emitAttr attr);
 #if defined(FEATURE_SIMD)

diff --git a/src/coreclr/jit/lsra.cpp b/src/coreclr/jit/lsra.cpp
@@ -789,16 +789,18 @@ LinearScan::LinearScan(Compiler* theCompiler)
     rbmFltCalleeTrash = compiler->rbmFltCalleeTrash;
 #endif // TARGET_AMD64
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     rbmAllMask        = compiler->rbmAllMask;
     rbmMskCalleeTrash = compiler->rbmMskCalleeTrash;
     memcpy(varTypeCalleeTrashRegs, compiler->varTypeCalleeTrashRegs, sizeof(regMaskTP) * TYP_COUNT);
 
+#if defined(TARGET_XARCH)
     if (!compiler->canUseEvexEncoding())
     {
         availableRegCount -= (CNT_HIGHFLOAT + CNT_MASK_REGS);
     }
 #endif // TARGET_XARCH
+#endif // FEATURE_MASKED_HW_INTRINSICS
 
     firstColdLoc = MaxLocation;
 
@@ -865,7 +867,7 @@ LinearScan::LinearScan(Compiler* theCompiler)
     availableDoubleRegs = RBM_ALLDOUBLE.GetFloatRegSet();
 #endif
 
-#if defined(TARGET_XARCH) || defined(TARGET_ARM64)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     availableMaskRegs = RBM_ALLMASK.GetPredicateRegSet();
 #endif
 

diff --git a/src/coreclr/jit/lsra.h b/src/coreclr/jit/lsra.h
@@ -1720,7 +1720,7 @@ class LinearScan : public LinearScanInterface
     PhasedVar<SingleTypeRegSet> availableIntRegs;
     PhasedVar<SingleTypeRegSet> availableFloatRegs;
     PhasedVar<SingleTypeRegSet> availableDoubleRegs;
-#if defined(TARGET_XARCH) || defined(TARGET_ARM64)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     PhasedVar<SingleTypeRegSet> availableMaskRegs;
 #endif
     PhasedVar<SingleTypeRegSet>* availableRegs[TYP_COUNT];
@@ -2087,7 +2087,7 @@ class LinearScan : public LinearScanInterface
     }
 #endif // TARGET_AMD64
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     regMaskTP rbmAllMask;
     regMaskTP rbmMskCalleeTrash;
 
@@ -2099,7 +2099,7 @@ class LinearScan : public LinearScanInterface
     {
         return this->rbmMskCalleeTrash;
     }
-#endif // TARGET_XARCH
+#endif // FEATURE_MASKED_HW_INTRINSICS
 
     unsigned availableRegCount;
 
@@ -2126,25 +2126,25 @@ class LinearScan : public LinearScanInterface
         return varTypeCalleeSaveRegs[rt].GetRegSetForType(rt);
     }
 
-#if defined(TARGET_XARCH)
+#if defined(FEATURE_MASKED_HW_INTRINSICS)
     // Not all of the callee trash values are constant, so don't declare this as a method local static
     // doing so results in significantly more complex codegen and we'd rather just initialize this once
     // as part of initializing LSRA instead
     regMaskTP varTypeCalleeTrashRegs[TYP_COUNT];
-#endif // TARGET_XARCH
+#endif // FEATURE_MASKED_HW_INTRINSICS
 
     //------------------------------------------------------------------------
     // callerSaveRegs: Get the set of caller-save registers of the given RegisterType
     //
     FORCEINLINE SingleTypeRegSet callerSaveRegs(RegisterType rt) const
     {
-#if !defined(TARGET_XARCH)
+#if !defined(FEATURE_MASKED_HW_INTRINSICS)
         static const regMaskTP varTypeCalleeTrashRegs[] = {
 #define DEF_TP(tn, nm, jitType, sz, sze, asze, st, al, regTyp, regFld, csr, ctr, tf) ctr,
 #include "typelist.h"
 #undef DEF_TP
         };
-#endif // !TARGET_XARCH
+#endif // !FEATURE_MASKED_HW_INTRINSICS
 
         assert((unsigned)rt < ArrLen(varTypeCalleeTrashRegs));
         return varTypeCalleeTrashRegs[rt].GetRegSetForType(rt);

diff --git a/src/coreclr/jit/targetarm64.h b/src/coreclr/jit/targetarm64.h
@@ -82,6 +82,10 @@
   #define RBM_MSK_CALLEE_SAVED    (0)
   #define RBM_MSK_CALLEE_TRASH    RBM_ALLMASK
 
+  #define RBM_ALLMASK_INIT            (0)
+  #define RBM_MSK_CALLEE_TRASH_INIT   (0)
+  #define CNT_CALLEE_TRASH_MASK_INIT  (0)
+
   #define RBM_CALLEE_SAVED        (RBM_INT_CALLEE_SAVED | RBM_FLT_CALLEE_SAVED)
   #define RBM_CALLEE_TRASH        (RBM_INT_CALLEE_TRASH | RBM_FLT_CALLEE_TRASH | RBM_MSK_CALLEE_TRASH)