Managed build fixes

dotnet · Dec 13, 2024 · c01dc7b · c01dc7b
1 parent e1fbc73
commit c01dc7b
Show file tree

Hide file tree

Showing 7 changed files with 12 additions and 19 deletions.
diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
@@ -20,6 +20,7 @@ public enum RelocType
         IMAGE_REL_BASED_LOONGARCH64_PC       = 0x16,   // LoongArch64: pcalau12i+imm12
         IMAGE_REL_BASED_LOONGARCH64_JIR      = 0x17,   // LoongArch64: pcaddu18i+jirl
         IMAGE_REL_BASED_RISCV64_PC           = 0x18,   // RiscV64: auipc
+        IMAGE_REL_BASED_RISCV64_JALR         = 0x19,   // RiscV64: jalr (indirect jump)
         IMAGE_REL_BASED_RELPTR32             = 0x7C,   // 32-bit relative address from byte starting reloc
                                                        // This is a special NGEN-specific relocation type
                                                        // for relative pointer (used to make NGen relocation

diff --git a/...Compiler/Compiler/DependencyAnalysis/Target_RiscV64/RiscV64ReadyToRunGenericHelperNode.cs b/...Compiler/Compiler/DependencyAnalysis/Target_RiscV64/RiscV64ReadyToRunGenericHelperNode.cs
@@ -47,8 +47,8 @@ protected void EmitDictionaryLookup(NodeFactory factory, ref RiscV64Emitter enco
             // should be reported by someone else - the system should not rely on it coming from here.
             if (!relocsOnly && _hasInvalidEntries)
             {
-                encoder.EmitXOR(encoder.TargetRegister.IntraProcedureCallScratch1, result, 0);
-                encoder.EmitJE(encoder.TargetRegister.IntraProcedureCallScratch1, GetBadSlotHelper(factory));
+                encoder.EmitXORI(encoder.TargetRegister.IntraProcedureCallScratch1, result, 0);
+                encoder.EmitJALR(Register.X0, encoder.TargetRegister.IntraProcedureCallScratch1, 0);
             }
         }
 

diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfBuilder.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfBuilder.cs
@@ -86,7 +86,7 @@ public DwarfBuilder(
                     _codeRelocType = RelocType.IMAGE_REL_BASED_DIR64;
                     break;
 
-                case TargetArchitecture.RISCV64:
+                case TargetArchitecture.RiscV64:
                     _targetPointerSize = 8;
                     _frameRegister = 8; // FP
                     _codeRelocType = RelocType.IMAGE_REL_BASED_DIR64;

diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfCie.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfCie.cs
@@ -93,7 +93,7 @@ public DwarfCie(TargetArchitecture targetArchitecture)
                     InitialCFAOffset = 0;
                     break;
 
-                case TargetArchitecture.RISCV64:
+                case TargetArchitecture.RiscV64:
                     CodeAlignFactor = 1;
                     DataAlignFactor = -8;
                     ReturnAddressRegister = 1; // RA

diff --git a/...reclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfExpressionBuilder.cs b/...reclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/Dwarf/DwarfExpressionBuilder.cs
@@ -165,7 +165,7 @@ public static int DwarfRegNum(TargetArchitecture architecture, int regNum)
                     // Normal registers are directly mapped
                     return regNum;
 
-                case TargetArchitecture.RISCV64:
+                case TargetArchitecture.RiscV64:
                     // Normal registers are directly mapped
                     return regNum;
 

diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfNative.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfNative.cs
@@ -607,9 +607,6 @@ internal static class ElfNative
         public const uint R_RISCV_PLT64 = 48;
         public const uint R_RISCV_COPY64 = 49;
         public const uint R_RISCV_RELATIVE64 = 50;
-        public const uint R_RISCV_TLS_DTPMOD64 = 51;
-        public const uint R_RISCV_TLS_DTPREL64 = 52;
-        public const uint R_RISCV_TLS_TPREL64 = 53;
         public const uint R_RISCV_64_ADD = 54;
         public const uint R_RISCV_64_SUB = 55;
         public const uint R_RISCV_64_HI20 = 56;

diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
@@ -60,7 +60,7 @@ public ElfObjectWriter(NodeFactory factory, ObjectWritingOptions options)
                 TargetArchitecture.ARM => EM_ARM,
                 TargetArchitecture.ARM64 => EM_AARCH64,
                 TargetArchitecture.LoongArch64 => EM_LOONGARCH,
-                TargetArchitecture.RiscV64 => EN_RISCV,
+                TargetArchitecture.RiscV64 => EM_RISCV,
                 _ => throw new NotSupportedException("Unsupported architecture")
             };
             _useInlineRelocationAddends = _machine is EM_386 or EM_ARM;
@@ -537,7 +537,7 @@ private void EmitRelocationsLoongArch64(int sectionIndex, List<SymbolicRelocatio
             }
         }
 
-        private void EmitRelocationsRiscV(int sectionIndex, List<SymbolicRelocation> relocationList)
+        private void EmitRelocationsRiscV64(int sectionIndex, List<SymbolicRelocation> relocationList)
         {
             if (relocationList.Count > 0)
             {
@@ -553,12 +553,8 @@ private void EmitRelocationsRiscV(int sectionIndex, List<SymbolicRelocation> rel
                         IMAGE_REL_BASED_DIR64 => R_RISCV_64,
                         IMAGE_REL_BASED_HIGHLOW => R_RISCV_32,
                         IMAGE_REL_BASED_RELPTR32 => R_RISCV_RELATIVE,
-                        IMAGE_REL_BASED_RISCV_CALL => R_RISCV_CALL,
-                        IMAGE_REL_BASED_RISCV_JUMP_SLOT => R_RISCV_JUMP_SLOT,
-                        IMAGE_REL_BASED_RISCV_TLS_LE => R_RISCV_TLS_LE,
-                        IMAGE_REL_BASED_RISCV_TLS_GD => R_RISCV_TLS_GD,
-                        IMAGE_REL_BASED_RISCV_TLS_IE => R_RISCV_TLS_IE,
-                        IMAGE_REL_BASED_RISCV_TLS_LD => R_RISCV_TLS_LD,
+                        IMAGE_REL_BASED_RISCV64_PC => R_RISCV_PCREL_HI20,
+                        IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_CALL32,
                         _ => throw new NotSupportedException("Unknown relocation type: " + symbolicRelocation.Type)
                     };
 
@@ -567,11 +563,10 @@ private void EmitRelocationsRiscV(int sectionIndex, List<SymbolicRelocation> rel
                     BinaryPrimitives.WriteInt64LittleEndian(relocationEntry.Slice(16), symbolicRelocation.Addend);
                     relocationStream.Write(relocationEntry);
 
-                    if (symbolicRelocation.Type is IMAGE_REL_BASED_RISCV_CALL)
+                    if (symbolicRelocation.Type is IMAGE_REL_BASED_RISCV64_PC)
                     {
-                        // Add an additional entry for the CALL relocation type
                         BinaryPrimitives.WriteUInt64LittleEndian(relocationEntry, (ulong)symbolicRelocation.Offset + 4);
-                        BinaryPrimitives.WriteUInt64LittleEndian(relocationEntry.Slice(8), ((ulong)symbolIndex << 32) | (type + 1));
+                        BinaryPrimitives.WriteUInt64LittleEndian(relocationEntry.Slice(8), ((ulong)symbolIndex << 32) | type + 1);
                         BinaryPrimitives.WriteInt64LittleEndian(relocationEntry.Slice(16), symbolicRelocation.Addend);
                         relocationStream.Write(relocationEntry);
                     }